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Design&Test
1991
Issue No. 1 - January/March
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Bibliographic References
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IEEE Design & Test of Computers
January/March 1991 (vol. 8 no. 1)
ISSN: 0740-7475
Table of Contents
News
News
(Abstract)
pp. 2-5
ABSTRACT
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Features
Concurrent Engineering in Product Development
(Abstract)
R.A. Sprague
K.J. Singh
R.T. Wood
pp. 6-13
ABSTRACT
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Simulation-Based Verification for High-Level Synthesis
(Abstract)
Rolf Ernst
Jayaram Bhasker
pp. 14-20
ABSTRACT
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The Compiled Logic Simulator
(Abstract)
Brion Keller
David P. Carlson
William Maloney
pp. 21-34
ABSTRACT
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Object Programming for CAD
(Abstract)
Wayne Wolf
pp. 35-42
ABSTRACT
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VHDL as Input for High-Level Synthesis
(Abstract)
R. Camposano
L.F. Saunders
R.M. Tabet
pp. 43-49
ABSTRACT
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A Rule-Based Design-for-Testability Rule Checker
(Abstract)
Mehrdad Bidjan-Irani
pp. 50-57
ABSTRACT
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A Fail-Safe Interlocking System for Railways
(Abstract)
Vinod Chandra
M.R. Verma
pp. 58-66
ABSTRACT
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Designing a Real-Time Coprocessor for Ada Tasking
(Abstract)
Joachim Roos
pp. 67-79
ABSTRACT
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A D&T Roundtable: ASIC Alternatives for System Design
(Abstract)
pp. 80-90
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TTTC Newsletter
TTTC Newsletter
(Abstract)
pp. 91-93
ABSTRACT
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Book Review
Book Review
(Abstract)
pp. 92-93
ABSTRACT
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Conference Reports
Conference Report
(Abstract)
pp. 94-95
ABSTRACT
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Product Review
Product Review
(Abstract)
pp. 96-97
ABSTRACT
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DATC Newsletter
DATC Newsletter
(Abstract)
pp. 102-103
ABSTRACT
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