Searching... Advanced Search
  • Pin the Dockbar
loading...
  • Design&Test
  • 1990
  • Issue No. 5 - September/October
Advanced Search 
 This Publication 
  
 
Subscribe to this Publication
Login to access your subscribed content
RSS feed for this Publication
 
 Bibliographic References 
 
  • ASCII Text
  • BibTex
  • RefWorks Procite/RefMan/EndNote
 
IEEE Design & Test of Computers
September/October 1990 (vol. 7 no. 5)
ISSN: 0740-7475
Table of Contents
D&T News
D&T News (Abstract)
pp. 3-4
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
Features
Guest Editorial: High-Level Synthesis of Digital Circuits (PDF)
Giovanni De Micheli
pp. 6-7
abstract
ABSTRACT
pdf
PDF
From Behavior to Structure: High-Level Synthesis (Abstract)
R. Camposano
pp. 8-19
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
xplore
IEEE Xplore Subscribers
An Optimizer for Hardware Synthesis (Abstract)
J. Bhasker
Huan-Chih Lee
pp. 20-36
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
xplore
IEEE Xplore Subscribers
The Olympus Synthesis System (Abstract)
Giovanni De Micheli
David Ku
Frederic Mailhot
Thomas Truong
pp. 37-53
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
xplore
IEEE Xplore Subscribers
Neural Net and Boolean Satisfiability Models of Logic Circuits (Abstract)
Srimat Chakradhar
Vishwani Agrawal
Michael Bushnell
Thomas Truong
pp. 54-57
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
xplore
IEEE Xplore Subscribers
DATC Newsletter
DATC Newsletter (Abstract)
pp. 62-63
abstract
ABSTRACT
PDF
HTML
Buy
PURCHASE ARTICLE: $19
Peer Review Notice | Give Us Feedback
Usage of this product signifies your acceptance of the Terms of Use.
  • Open
  • Download
Print and Online Advertising Opportunities
 
This site and all contents (unless otherwise noted) are Copyright © IEEE. All rights reserved.
Site Map | Privacy Policy | Nondiscrimination Policy | Contact Us