This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Performance Measurement and Modeling to Evaluate Various Effects on a Shared memory Multiprocessor
January 1991 (vol. 17 no. 1)
pp. 87-93

Shared-memory multiprocessor performance is strongly affected by factors such as sequential code, barriers, cache coherence, virtual memory paging, and the multiprocessor system itself with resource scheduling and multiprogramming. Several timing models and analysis for these effects are presented. A modified Ware model based on these timing models is given to evaluate comprehensive performance of a shared-memory multiprocessor. Performance measurement has been done on the Encore Multimax, a shared-memory multiprocessor. The evaluation models are the analyses based on a general shared-memory multiprocessor system and architecture and can be applied to other types of shared-memory multiprocessors. Analytical and experimental results give a clear understanding of the various effects and a correct measure of the performance, which are important for the effective use of a shared-memory multiprocessor.

[1] A. Agarwal and A. Gupta, "Memory-reference characteristics of multiprocessor applications under MACH," inProc. ACM SIGMETRICS Conf Measurement and Modeling of Computer Systems, 1988, pp. 215-226.
[2] G. A. Amdahl, "Validity of the single-processor approach to achieving large scale computing capabilities," inAFIPS Conf. Proc., vol. 30. Reston, VA: AFIPS Press, 1967, pp. 483-485.
[3] L. A. Belady and C. J. Kuehner, "Dynamic space sharing in computer system,"Commun. ACM, vol. 12, pp. 282-288, May 1969.
[4] L. M. Censier and P. Feautrier, "A new solution to coherence problems in multicache systems,"IEEE Trans. Comput., vol. C-27, no. 12, pp. 1112-1118, 1978.
[5] Encore Computer Corp.,Multimax Technical Summary, Marlboro, MA, 1985.
[6] H. F. Jordan, "Problems in characterizing barrier performance," inInstrumentation for Future Parallel Computing Systems, M. Simmons, R. Koskela, and I. Bucher, Eds. New York: ACM Press, 1989, pp. 185-200.
[7] E. Gelenbe,Multiprocessor Performance. New York: Wiley, 1989.
[8] E. Gelenbe, "Multiprocessor performance and the activity set model of program behavior," inHigh Performance Computing, J.-L. Delhaye and E. Gelenbe, Eds. Amsterdam, The Netherlands: North-Holland, 1989, pp. 121-132.
[9] E. Gelenbeet al., "Asymptotic processing time of a model of parallel computation," inProc. Nat. Comput. Conf., Las Vegas, NV, Nov. 1986.
[10] E. Gelenbe, J. Boekhorst, and J. Kessels, "Minimizing wasted space in partitioned segmentation,"Commun. ACM, vol. 16, no. 6, pp. 343-349, 1973.
[11] E. Gelenbe and I. Mitrani,Analysis and Synthesis of Computer Systems.New York: Academic, 1980.
[12] E. Gelenbe, P. Tiberio, and J. Boekhorst, "Page size in demand paging systems,"Acta Inform., vol. 3, pp. 1-23, 1973.
[13] J. L. Gustafson, "Re-evaluating Amdahl's Law,"Commun. ACM, vol. 31, no. 5, pp. 532-533, 1988.
[14] C. P. Kruskal and A. Weiss, "Allocating independent subtasks on parallel processors," inProc. 1984 Int. Conf. Parallel Processing, 1984, pp. 236-240.
[15] H. Lorin and H. Deitel,Operating Systems. Reading, MA: Addison-Wesley, 1981.
[16] L. Rudolph and Z. Segall, "Dynamic decentralized cache schemes for MIMD parallel processors," inProc. 11th Int. Symp. Computer Architecture, 1984, pp. 340-347.
[17] A. Smith, "Cache Memories,"Computing Surveys, Vol. 14, No. 3, Sept. 1982, pp. 473- 530.
[18] W. H. Ware, "The ultimate computer,"IEEE Spectrum, pp. 84-91, Mar. 1972.
[19] X. Zhang, "Parallel block SOR methods and various effects on shared and local memory multiprocessors,"Supercomputer, vol. VI, no. 3, pp. 24-35, 1989.
[20] X. Zhang, "Experiments and analysis concerning the various effects on shared memory multiprocessor performance," inProc. Fourth Int. Conf. Supercomputing, vol. 1, 1989, pp. 194-201.

Index Terms:
performance measurement; performance modelling; shared memory multiprocessor; sequential code; barriers; cache coherence; virtual memory paging; resource scheduling; multiprogramming; timing models; modified Ware model; Encore Multimax; architecture; multiprocessing systems; performance evaluation
Citation:
X. Zhang, "Performance Measurement and Modeling to Evaluate Various Effects on a Shared memory Multiprocessor," IEEE Transactions on Software Engineering, vol. 17, no. 1, pp. 87-93, Jan. 1991, doi:10.1109/32.67581
Usage of this product signifies your acceptance of the Terms of Use.