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Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors
February 1990 (vol. 16 no. 2)
pp. 183-196

The authors provide an in-depth study of the various issues and tradeoffs available in algorithm-based error detection, as well as a general methodology for evaluating the schemes. They illustrate the approach on an extremely useful computation in the field of numerical linear algebra: QR factorization. They have implemented and investigated numerous ways of applying algorithm-based error detection using different system-level encoding strategies for QR factorization. Specifically, schemes based on the checksum and sum-of-squares (SOS) encoding techniques have been developed. The results of studies performed on a 16-processor Intel iPSC-2/D4/MX hypercube multiprocessor are reported. It is shown that, in general, the SOS approach gives much better coverage (85-100%) for QR factorization while maintaining low overheads (below 10%).

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Index Terms:
hypercube multiprocessors; algorithm-based error detection; numerical linear algebra; QR factorization; encoding; checksum; sum-of-squares; 16-processor Intel iPSC-2/D4/MX; encoding; error detection; linear algebra; multiprocessing systems; software engineering.
Citation:
V. Balasubramanian, P. Banerjee, "Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors," IEEE Transactions on Software Engineering, vol. 16, no. 2, pp. 183-196, Feb. 1990, doi:10.1109/32.44381
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