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Design Tradeoffs for Process Scheduling in Shared Memory Multiprocessor Systems
March 1989 (vol. 15 no. 3)
pp. 327-334

A potential system software bottleneck is demonstrated in designing an efficient process scheduling method for multiprocessor systems with shared-memory communication mechanism. The process scheduling overhead is considered. The main contribution of this work is to find the design tradeoffs between monitor bottleneck due to scheduling overhead and low process utilization due to load imbalancing. Choosing an optimum number of scheduling monitors is the key to resolve the bottlenecks. Because of the excessive number of memory requests generated by the dynamic monitor selection method, the use of the fixed monitor selection method is recommended. An analytic estimation provides a lower bound in determining the optimum number of monitors. Hill-climbing simulation is then used to find the optimum number of monitors.

[1] J. L. Baer, "A survey of some theoretical aspects of multiprocessing,"ACM Comput. Surveys, vol. 5, pp. 31-80, Mar. 1983.
[2] F. A. Briggs and M. Dubois, "Effectiveness of private caches in multiprocessor systems with parallel-pipelined memories,"IEEE Trans. Comput., vol. C-32, pp. 48-59, Jan. 1983.
[3] Y. C. Chow and W. H. Kohler, "Models for dynamic load balancing in a heterogeneous multiple processor system,"IEEE Trans. Comput., vol. C-28, pp. 354-361, May 1979.
[4] W. Crowther, J. Goodhue, E. Starr, R. Thomas, W. Milliken, and T. Blackadar, "Performance measurements on a 128-node Butterfly parallel processor," inProc. 1985 Int. Conf. Parallel Processing, Aug. 1985, pp. 531-540.
[5] P. J. Denning, T. D. Dennis, and J. A. Brumfield, "Low contention semaphores and ready lists,"Commun. ACM, vol. 24, no. 10, pp. 687-698, Oct. 1981.
[6] J. J. Dongarra and I. S. Duff, "Advanced architecture computers," Math. Comput. Sci. Division, Argonne National Lab., Tech. Memo. 57, Oct. 1985.
[7] P. H. Enslow, "Multiprocessor organization,"Comput. Surveys, ACM, vol. 9, pp. 103-109, Mar. 1977.
[8] S. H. Fuller and S. P. Harbison, "The C.mmp multiprocessor," Dep. Comput. Sci., Carnegie-Mellon Univ., Tech. Rep., 1978.
[9] D. D. Gajski, D. J. Kuck, D. H. Lawrie, and A. H. Sameh, "Cedar-- A large scale multiprocessor," inProc. 1983 Int. Conf. Parallel Processing, Aug. 1983, pp. 524-529.
[10] A. Gottliebet al., "The NYU ultracomputer--Designing a MIMD shared-memory parallel computer,"IEEE Trans. Comput., vol. C- 32, pp. 175-189, Feb. 1983.
[11] J. L. Gustafson, S. Hawkinson, and K. Scott, "The architecture of a homogeneous vector supercomputer," inProc. 1986 Int. Conf. Parallel Processing, Aug. 1986, pp. 649-652.
[12] C. A. R. Hoare, "Monitors: an operating system structuring concept,"Commun. ACM, vol. 17, no. 10, pp. 549-557, Oct. 1974.
[13] K. Hwang and F. A. Briggs,Computer Architecture and Parallel Processing. New York: McGraw-Hill, 1984.
[14] Introduction to iAPX-432 Architecture, Intel Co., 1981.
[15] L. Kleinrock,Queueing Systems, Vol. 1: Theory. New York: Wiley, 1975.
[16] S. S. Lam and J. W. Wong, "Queueing network models of packet-switching networks," Dep. Comput. Sci., Univ. Waterloo, Res. Rep. CS-81-06, Feb. 1981.
[17] H. C. Lauer and R. M. Needham, "On the duality of operating system structures,"Oper. Syst. Rev., vol. 13, pp. 3-19, Apr. 1979.
[18] T. J. LeBlanc, "Shared memory versus message-passing in a tightlycoupled multiprocessor: A case study," inProc. 1986 Int. Conf. Parallel Processing, Aug. 1986, pp. 463-466.
[19] M. Livny and M. Melman, "Load balancing in homogeneous broadcast distributed systems,"Perform. Eval. Rev., vol. 11, no. 1, pp. 47-55, Apr. 1982.
[20] L. M. Ni and K. Hwang, "Optimum probabilistic load balancing for a multiple processor system,"IEEE Trans. Software Eng., vol. SE- 11, pp. 491-496, May 1985.
[21] R. Olson, "Parallel processing in a message-based operating system,"IEEE Software, vol. 2, pp. 39-49, July 1985.
[22] R. Rettberg and R. Thomas, "Contention Is No Obstacle to Shared-Memory Multiprocessing,"Comm. ACM, Vol. 29, No. 12, Dec. 1986, pp. 1202-1212.

Index Terms:
hill climbing simulation; performance evaluation; process scheduling; shared memory multiprocessor systems; software bottleneck; monitor bottleneck; low process utilization; load imbalancing; memory requests; fixed monitor selection; multiprocessing programs; multiprocessing systems; performance evaluation; scheduling; supervisory programs.
L.M. Ni, C.-F.E. Wu, "Design Tradeoffs for Process Scheduling in Shared Memory Multiprocessor Systems," IEEE Transactions on Software Engineering, vol. 15, no. 3, pp. 327-334, March 1989, doi:10.1109/32.21760
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