This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Semiconcurrent Online Testing of Transition Faults through Output Response Comparison of Identical Circuits
July-September 2009 (vol. 6 no. 3)
pp. 231-240
Irith Pomeranz, Purdue University, West Lafayette,
Sudhakar M. Reddy, University of Iowa, Iowa City
We describe a method for online testing of delay faults based on the comparison of output responses of identical circuits. The method allows one of the circuits to participate in useful computations during the testing process, while the other circuit must be idle. We refer to this method as semiconcurrent online testing. While unknown input vectors are applied to the circuit that participates in useful computations, the proposed method applies modified vectors to the idle circuit. In this way, different conditions are created for the detection of delay faults, allowing identical delay faults that affect both circuits to be detected. In designing the modified vectors, we ensure that the expected fault-free responses of the two circuits are identical. We also ensure that the hardware for modifying the vectors applied to the idle circuit will be easy to implement on-chip.

[1] D.A. Patterson and J.L. Hennessy, Computer Organization and Design: The Hardware/Software Interface. Morgan Kaufmann, 1994.
[2] M. Abramovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design. Computer Science Press, 1990.
[3] Fault-Tolerant Computer System Design, D.K. Pradhan, ed. Prentice Hall, 1996.
[4] Y. Zorian, E.J. Marinissen, and S. Dey, “Testing Embedded-Core Based System Chips,” Proc. Int'l Test Conf. (ITC '98), pp. 130-143, Oct. 1998.
[5] F. Rashid, K.K. Saluja, and P. Ramanathan, “Fault Tolerance through Re-Execution in Multiscalar Architectures,” Proc. Int'l Conf. Dependable Systems and Networks (DSN '00), pp. 482-491, June 2000.
[6] S. Koppolu and A. Chatterjee, “Hierarchical Diagnosis of IdenticalUnits in a System,” IEEE Trans. Computers, vol. 50, no. 2, pp. 186-191, Feb. 2001.
[7] I. Pomeranz and S.M. Reddy, “A Method to Enhance the Fault Coverage Obtained by Output Response Comparison of Identical Circuits,” Proc. Int'l Test Conf. (ITC '01), pp. 196-203, Oct. 2001.
[8] I. Pomeranz and S.M. Reddy, “Concurrent On-Line Testing of Identical Circuits through Output Comparison Using Non-Identical Input Vectors,” Proc. 19th Int'l Symp. Defect and Fault Tolerance in VLSI Systems (DFT '04), pp. 469-476, Oct. 2004.
[9] I. Pomeranz and S.M. Reddy, “Fault Detection by Output Response Comparison of Identical Circuits Using Half-Frequency Compatible Sequences,” Proc. Int'l Test Conf. (ITC '06), Oct. 2006.
[10] S. Zachariah, Y.-S. Chang, S. Kundu, and C. Tirumurti, “On Modeling Cross-Talk Faults,” Proc. Design, Automation and Test in Europe Conf. (DATE '03), pp. 490-495, Mar. 2003.
[11] B. Kruseman, A. Majhi, C. Hora, S. Eichenberger, and J. Meirlevede, “Systematic Defects in Deep Sub-Micron Technologies,” Proc. Int'l Test Conf. (ITC '04), pp. 290-299, Oct. 2004.
[12] P. Nigh and A. Gattiker, “Random and Systematic Defect Analysis Using IDDQ Signature Analysis for Understanding Fails and Guiding Test Decisions,” Proc. Int'l Test Conf. (ITC '04), pp. 309-318, Oct. 2004.
[13] R. Madge, B. Benware, R. Turakhia, R. Daasch, C. Schuermyer, and J. Ruffler, “In Search of the Optimum Test Set—Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost,” Proc. Int'l Test Conf. (ITC '04), pp. 203-212, Oct. 2004.
[14] L.M. Huisman, M. Kassab, and L. Pastel, “Data Mining Integrated Circuit Fails with Fail Commonalities,” Proc. Int'l Test Conf. (ITC '04), pp. 661-668, Oct. 2004.
[15] I. Pomeranz and S.M. Reddy, “At-Speed Delay Testing of Synchronous Sequential Circuits,” Proc. 29th Design Automation Conf. (DAC '92), pp. 177-181, June 1992.

Index Terms:
Concurrent online testing, online testing, permanent faults, transition faults.
Citation:
Irith Pomeranz, Sudhakar M. Reddy, "Semiconcurrent Online Testing of Transition Faults through Output Response Comparison of Identical Circuits," IEEE Transactions on Dependable and Secure Computing, vol. 6, no. 3, pp. 231-240, July-Sept. 2009, doi:10.1109/TDSC.2008.34
Usage of this product signifies your acceptance of the Terms of Use.