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Polymorphic-Torus Architecture for Computer Vision
March 1989 (vol. 11 no. 3)
pp. 233-243

A massively parallel fine-grained SIMD (single-instruction multi-data-stream) computer for machine vision computations is described. The architecture features a polymorphic-torus network which inserts an individually controllable switch into every node of the two-dimensional torus such that the network is dynamically reconfigurable to match the algorithm. Reconfiguration is accomplished by circuit switching and is achieved at fine-grained level. Using both the processor coordinate in the torus and the data for reconfiguration, the polymorphic-torus achieves solution time that is superior or equivalent to that of popular vision architectures such as mesh, tree, pyramid and hypercube for many vision algorithms discussed. Implementation of the architecture is given to illustrate its VLSI efficiency.

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Index Terms:
parallel architectures; dynamically reconfigurable network; computer vision; SIMD; machine vision; polymorphic-torus network; circuit switching; mesh; tree; pyramid; hypercube; VLSI efficiency; computer vision; parallel algorithms; parallel architectures; VLSI
Citation:
H. Li, M. Maresca, "Polymorphic-Torus Architecture for Computer Vision," IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 11, no. 3, pp. 233-243, March 1989, doi:10.1109/34.21792
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