This Article 
 Bibliographic References 
 Add to: 
An Automatic Wafer Inspection System Using Pipelined Image Processing Techniques
January 1988 (vol. 10 no. 1)
pp. 4-16

An automatic wafer pattern inspection system has been developed that can detect defective patterns 6 mu m or larger in multilayered wafer patterns at a speed 30 times faster than that of a human inspector. The false-alarm rate is less than 0.5 occurrences/chip. This performance is achieved mainly by the use of a special comparison method between two adjacent patterns obtained through a single optical setup, and also by the use of digital design pattern data (CAD data). The main functions of the design pattern data are to specify the inspection area, to designate optimum parameters for inspection, and to separate defective portions into different layers, thereby facilitating the classification of the defects. All image processing is performed in one pass by a high-speed pipeline-structured image processor that can analyze an input image signal at a 7 MHz video rate.

[1] K. Harris, P. Sandland, and R. Singleton, "Wafer inspection automation: Current and future system,"Solid State Technol., Aug. 1983.
[2] M. Ejiriet al., "A process for detecting defects in complicated patterns,"Comput. Graphics Image Processing, vol. 2, p. 326, 1973.
[3] J. F. Jarvis, "A method for automating the visual inspection of printed wiring board,"IEEE Trans. Pattern Anal. Machine Intell., vol. PAMI-2, pp. 77-82, Jan. 1980.
[4] Y. Hara, N. Akiyama, and K. Karasaki, "Automatic inspection system for printed circuit boards,"IEEE Trans. Pattern Anal. Machine Intell., vol. PAMI-5, pp. 623-630, Nov. 1983.
[5] J. H. Bruninget al., "An automated mask inspection system-- AMIS,"IEEE Trans. Electron Devices, vol. ED-22, pp. 487-495, July 1975.
[6] N. Gotoet al., "An automatic inspection system for mask patterns," inProc. Fourth Int. Joint Conf. Pattern Recognition, Nov. 1978, pp. 970-974.
[7] R. L. Fuseket al., "Holographic optical processing for submicrometer defect detection,"Opt. Eng., vol. 24, no. 5, pp. 731-734, Oct. 1985.
[8] T. Konishiet al., "Surface directed inspection system for VLSI wafer,"J. Inst. Television Eng. Japan, vol. 36, no. 1, pp. 38-44, 1982 (in Japanese).
[9] D. Awamura and K. Nakashima, "Defect inspection techniques for LSI wafer,"Semiconductor World, pp. 112-119, June 1984 (in Japanese).
[10] K. L. Harris, P. Sandland, and R. M. Singleton, "Automated inspection of wafer patterns with applications in stepping, projection and direct-write lithography,"Solid State Technol., pp. 159-179, Feb. 1984.
[11] L. F. Pau, "Integrated testing and algorithms for visual inspection of integrated circuits,"IEEE Trans. Pattern Anal. Machine Intell., vol. PAMI-5, pp. 602-608, Nov. 1983.
[12] Y. Y. Hsieh and K. S. Fu, "An automatic visual inspection of integrated circuit chips,"Comput. Graphics Image Processing, vol. 14, pp. 293-343, 1980.
[13] A. Rosenfeld and A. Kak,Digital Picture Processing, New York: Academic, 1976.

Index Terms:
computer vision; defect detection; defect classification; picture processing; pattern recognition; automatic wafer inspection system; pipelined image processing techniques; defective patterns; multilayered wafer patterns; false-alarm rate; comparison method; digital design pattern data; CAD data; 6 micron; 7 MHz; circuit analysis computing; computer vision; computerised pattern recognition; computerised picture processing; fault location; inspection; integrated circuit testing; pipeline processing
H. Yoda, Y. Ohuchi, Y. Taniguchi, M. Ejiri, "An Automatic Wafer Inspection System Using Pipelined Image Processing Techniques," IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 10, no. 1, pp. 4-16, Jan. 1988, doi:10.1109/34.3863
Usage of this product signifies your acceptance of the Terms of Use.