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Energy-Efficient Scheduling of Periodic Real-Time Tasks on Lightly Loaded Multicore Processors
March 2012 (vol. 23 no. 3)
pp. 530-537
Wan Yeon Lee, Dongduk Women's University, Seoul
For lightly loaded multicore processors that contain more processing cores than running tasks and have dynamic voltage and frequency scaling capability, we address the energy-efficient scheduling of periodic real-time tasks. First, we introduce two energy-saving techniques for the lightly loaded multicore processors: exploiting overabundant cores for executing a task in parallel with a lower frequency and turning off power of rarely used cores. Next, we verify that if the two introduced techniques are supported, then the problem of minimizing energy consumption of real-time tasks while meeting their deadlines is NP-hard on a lightly loaded multicore processor. Finally, we propose a polynomial-time scheduling scheme that provides a near minimum-energy feasible schedule. The difference of energy consumption between the provided schedule and the minimum-energy schedule is limited. The scheme saves up to 64 percent of the processing core energy consumed by the previous scheme that executes each task on a separate core.

[1] M. Nikitovic and M. Brorsson, "An Adaptive Chip-Multiprocessor Architecture for Future Mobile Terminals," Proc. Int'l Conf. Compilers, Architecture, and Synthesis for Embedded Systems, pp. 43-49, 2002.
[2] D. Geer, "Industry Trends: Chip Makers Turn to Multicore Processors," Computer, vol. 38, no. 5, pp. 11-13, 2005.
[3] "Int'l Technology Roadmap for Semiconductors:," Ed., Semiconductor Industry Assoc. (SIA), http:/www.itrs.net, 2005.
[4] J.H. Anderson and S.K. Baruah, "Energy-Efficient Synthesis of Periodic Task Systems upon Identical Multiprocessor Platforms," Proc. Int'l Conf. Distributed Computing Systems (ICDCS), pp. 428-435, 2004.
[5] C.-Y. Yang, J.-J. Chen, and T.-W. Kuo, "An Approximation Algorithm for Energy-Efficient Scheduling on a Chip Multiprocessor," Proc. Design, Automation and Test in Europe (DATE) Conf., pp. 468-473, 2005.
[6] R. Xu, C. Xi, R. Melhem, and D. Moss, "Practical Pace for Embedded Systems," Proc. ACM Int'l Conf. Embedded Software (EMSOFT), pp. 54-63, 2004.
[7] C. Xian and Y.-H. Lu, "Dynamic Voltage Scaling for Multitasking Real-Time Systems with Uncertain Execution Time," Proc. ACM Great Lakes Symp. VLSI (GLSVLSI), pp. 392-397, 2006.
[8] D. Zhu, R. Melhem, and B.R. Childers, "Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multiprocessor Real-Time Systems," IEEE Trans. Parallel Distributed System, vol. 14, no. 7, pp. 686-700, July 2003.
[9] H. Aydin, R. Melhem, D. Mossé, and P. Mejía-Alvarez, "Power-Aware Scheduling for Periodic Real-Time Tasks," IEEE Trans. Computers, vol. 53, no. 5, pp. 584-600, May 2004.
[10] E. Seo, J. Jeong, S. Park, and J. Lee, "Energy Efficient Scheduling of Real-Time Tasks on Multicore Processors," IEEE Trans. Parallel Distributed System, vol. 19, no. 11, pp. 1540-1552, Nov. 2008.
[11] H. Aydin and Q. Yang, "Energy-Aware Partitioning for Multiprocessor Real-Time Systems," Proc. Int'l Parallel and Distributed Processing Symp. (IPDPS), p. 113.2, 2003.
[12] C. Xian, Y.-H. Lu, and Z. Li, "Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time," Proc. Ann. Design Automation Conf. (DAC), pp. 664-669, 2007.
[13] J.-J. Chen and T.-W. Kuo, "Multiprocessor Energy-Efficient Scheduling for Real-Time Tasks with Different Power Characteristics," Proc. Int'l Conf. Parallel Processing (ICPP), pp. 13-20, 2005.
[14] H. Kim, H. Hong, H.-S. Kim, J.-H. Ahn, and S. Kang, "Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 11, pp. 2088-2092, Nov. 2008.
[15] J. Luo and N.K. Jha, "Power-Efficient Scheduling for Heterogeneous Distributed Real-Time Embedded Systems," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 6, pp. 1161-1170, June 2007.
[16] A. Andrei, P. Eles, Z. Peng, M.T. Schmitz, and B.M. Al Hashimi, "Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection," IEEE Trans. Very Large Scale Integration Systems, vol. 15, no. 3, pp. 262-275, Mar. 2007.
[17] J. Li and J.F. Martínez, "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors," Proc. Int'l Symp. High-Performance Computer Architecture (HPCA), pp. 77-87, 2006.
[18] W.Y. Lee, H. Kim, and H. Lee, "Energy-Efficient Scheduling of a Real-Time Task on DVFS-Enabled Multi-Cores," Technical Report CIC-CCS-TR 08-001, Korea Univ., http://ccs.korea.ac.kr/pdsTR08-001.pdf, 2008.
[19] E. Talpes and D. Marculescu, "Toward a Multiple Clock/Voltage Island Design Style for Power-Aware Processors," IEEE Trans. Very Large Scale Integration Systems, vol. 13, no. 5, pp. 591-603, May 2005.
[20] G. Magklis, G. Semeraro, D.H. Albonesi, S.G. Dropsho, S. Dwarkadas, and M.L. Scott, "Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor," IEEE Micro, vol. 23, no. 6, pp. 62-68, Nov./Dec. 2003.
[21] K. Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability. McGraw-Hill Higher Education, 1992.
[22] P.-E. Bernard, T. Gautier, and D. Trystram, "Large Scale Simulation of Parallel Molecular Dynamics," Proc. Int'l Parallel Processing Symp. (IPPS), pp. 638-644, 1999.
[23] P. Li, B. Veeravalli, and A.A. Kassim, "Design and Implementation of Parallel Video Encoding Strategies Using Divisible Load Analysis," IEEE Trans. Circuits and Systems for Video Technology, vol. 15, no. 9, pp. 1098-1112, Sept. 2005.
[24] G.W. Cook and E.J. Delp, "An Investigation of Scalable SIMD I/O Techniques with Application to Parallel JPEG Compression," J. Parallel Distributed Computing, vol. 30, no. 2, pp. 111-128, 1995.
[25] D.L. Eager, J. Zahorjan, and E.D. Lozowska, "Speedup versus Efficiency in Parallel Systems," IEEE Trans. Computers, vol. 38, no. 3, pp. 408-423, Mar. 1989.
[26] H. Lee, J. Kim, S. Hong, and S. Lee, "Processor Allocation and Task Scheduling of Matrix Chain Products on Parallel Systems," IEEE Trans. Parallel Distributed System, vol. 14, no. 4, pp. 394-407, Apr. 2003.
[27] A. Maxiaguine, S. Künzli, and L. Thiele, "Workload Characterization Model for Tasks with Variable Execution Demand," Proc. Design, Automation and Test in Europe (DATE) Conf., p. 21040, 2004.
[28] S.-S. Lim, Y.H. Bae, G.T. Jang, B.-D. Rhee, S.L. Min, C.Y. Park, H. Shin, K. Park, S.-M. Moon, and C.S. Kim, "An Accurate Worst Case Timing Analysis for RISC Processors," IEEE Trans. Software Eng., vol. 21, no. 7, pp. 593-604, July 1995.
[29] W. Yuan and K. Nahrstedt, "Energy-Efficient Soft Real-Time CPU Scheduling for Mobile Multimedia Systems," Proc. ACM Symp. Operating Systems Principles (SOSP), pp. 149-163, 2003.
[30] J.R. Lorch and A.J. Smith, "Improving Dynamic Voltage Scaling Algorithms with PACE," Proc. SIGMETRICS/Performance Evaluation Rev., vol. 29, pp. 50-61, 2001.
[31] J.E.G. Coffman, M.R. Garey, and D.S. Johnson, "Approximation Algorithms for Bin Packing: A Survey," Approximation Algorithms for NP-Hard Problems, D.S. Hochbaum, ed., ch. 2., pp. 46-93, PWS Publishing Co., 1996.

Index Terms:
Energy minimization, multicore processor, periodic real-time task, scheduling, dynamic voltage and frequency scaling.
Citation:
Wan Yeon Lee, "Energy-Efficient Scheduling of Periodic Real-Time Tasks on Lightly Loaded Multicore Processors," IEEE Transactions on Parallel and Distributed Systems, vol. 23, no. 3, pp. 530-537, March 2012, doi:10.1109/TPDS.2011.87
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