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Issue No.07 - July (2011 vol.22)
pp: 1192-1205
Yunlian Jiang , The College of William and Mary, Williamsburg
Kai Tian , The College of William and Mary, Williamsburg
Xipeng Shen , The College of William and Mary, Williamsburg
Jinghe Zhang , University of North Carolina at Chapel Hill, Chapel Hill
Jie Chen , the Thomas Jefferson National Accelerator Facility, VA
Rahul Tripathi , University of South Florida, Tampa
ABSTRACT
In Chip Multiprocessors (CMPs) architecture, it is common that multiple cores share some on-chip cache. The sharing may cause cache thrashing and contention among co-running jobs. Job co-scheduling is an approach to tackling the problem by assigning jobs to cores appropriately so that the contention and consequent performance degradations are minimized. Job co-scheduling includes two tasks: the estimation of co-run performance, and the determination of suitable co-schedules. Most existing studies in job co-scheduling have concentrated on the first task but relies on simple techniques (e.g., trying different schedules) for the second. This paper presents a systematic exploration to the second task. The paper uncovers the computational complexity of the determination of optimal job co-schedules, proving its NP-completeness. It introduces a set of algorithms, based on graph theory and Integer/Linear Programming, for computing optimal co-schedules or their lower bounds in scenarios with or without job migrations. For complex cases, it empirically demonstrates the feasibility for approximating the optimal effectively by proposing several heuristics-based algorithms. These discoveries may facilitate the assessment of job co-schedulers by providing necessary baselines, as well as shed insights to the development of co-scheduling algorithms in practical systems.
INDEX TERMS
Co-scheduling, shared cache, CMP scheduling, cache contention, perfect matching, integer programming.
CITATION
Yunlian Jiang, Kai Tian, Xipeng Shen, Jinghe Zhang, Jie Chen, Rahul Tripathi, "The Complexity of Optimal Job Co-Scheduling on Chip Multiprocessors and Heuristics-Based Solutions", IEEE Transactions on Parallel & Distributed Systems, vol.22, no. 7, pp. 1192-1205, July 2011, doi:10.1109/TPDS.2010.193
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