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Issue No.05 - May (2011 vol.22)
pp: 833-846
Jay Cheng , National Tsing Hua University, Hsinchu
Duan-Shin Lee , National Tsing Hua University, Hsinchu
Cheng-Shang Chang , National Tsing Hua University, Hsinchu
It is well known that output-buffered switches have better performance than other switch architectures. However, output-buffered switches also suffer from the notorious scalability problem, and direct constructions of large output-buffered switches are difficult. In this paper, we study the problem of constructing scalable switches that have comparable performance (in the sense of 100 percent throughput and first-in first-out (FIFO) delivery of packets from the same flow) to output-buffered switches. For this, we propose a new concept, called quasi-output-buffered switch. Like an output-buffered switch, a quasi-output-buffered switch is a deterministic switch that achieves 100 percent throughput and delivers packets from the same flow in the FIFO order. Using the three-stage Clos network, we show that one can recursively construct a larger quasi-output-buffered switch with a set of smaller quasi-output-buffered switches. By recursively expanding the three-stage Clos network, we obtain a quasi-output-buffered switch with only 2\times 2 switches. Such a switch is called a packet-pair switch in this paper as it always transmits packets in pairs. By computer simulations, we show that packet-pair switches have better delay performance than most load-balanced switches with comparable construction complexity.
Delay performance, load-balanced switches, output-buffered switches, packet-pair switches, quasi-output-buffered switches.
Jay Cheng, Duan-Shin Lee, Cheng-Shang Chang, "Quasi-Output-Buffered Switches", IEEE Transactions on Parallel & Distributed Systems, vol.22, no. 5, pp. 833-846, May 2011, doi:10.1109/TPDS.2010.188
[1] H. Ahmadi and W.E. Denzel, "A Survey of Modern High-Performance Switching Techniques," IEEE J. Selected Areas in Comm., vol. 7, no. 7, pp. 1091-1103, Sept. 1989.
[2] S. Iyer and N. McKeown, "Making Parallel Packet Switch Practical," Proc. IEEE INFOCOM '01, Apr. 2001.
[3] I. Stoica and H. Zhang, "Exact Emulation of an Output Queuing Switch by a Combined Input Output Queuing Switch," Proc. IEEE/IFIP Int'l Workshop Quality of Service (IWQoS '98), pp. 218-224, May 1998.
[4] S.-T. Chuang, A. Goel, N. McKeown, and B. Prabhkar, "Matching Output Queuing with a Combined Input/Output-Queued Switch," IEEE J. Selected Areas in Comm., vol. 17, no. 6, pp. 1030-1039, June 1999.
[5] C.-S. Chang, D.-S. Lee, and Y.-S. Jou, "Load Balanced Birkhoff-Von Neumann Switches, Part I: One-Stage Buffering," Computer Comm., vol. 25, pp. 611-622, Apr. 2002.
[6] I. Keslassy, S.-T. Chuang, K. Yu, D. Miller, M. Horowitz, O. Solgaard, and N. McKeown, "Scaling Internet Routers Using Optics," Proc. ACM SIGCOMM '03, Aug. 2003.
[7] Y. Shen, S. Jiang, S.S. Panwar, and H.J. Chao, "Byte-Focal: A Practical Load-Balanced Switch," Proc. IEEE Workshop High Performance Switching and Routing (HPSR '05), May 2005.
[8] J.-J. Jaramillo, F. Milan, and R. Srikant, "Padded Frames: A Novel Algorithm for Stable Scheduling in Load-Balanced Switches," IEEE/ACM Trans. Networking, vol. 16, no. 5, pp. 1212-1225, Oct. 2008.
[9] C.-L. Yu, C.-S. Chang, and D.-S. Lee, "CR Switch: A Load-Balanced Switch with Contention and Reservation," IEEE/ACM Trans. Networking, vol. 17, no. 5, pp. 1659-1671, Oct. 2009.
[10] C. Clos, "A Study of Nonblocking Switching Networks," Bell System Technical J., vol. 32, pp. 406-424, Mar. 1953.
[11] V.E. Benes, Mathematical Theory of Connecting Networks and Telephone Traffic. Academic Press, 1965.
[12] C.-S. Chang, J.A. Thomas, and S.-H. Kiang, "On the Stability of Open Networks: A Unified Approach by Stochastic Dominance," Queuing Systems: Theory and Applications, vol. 15, pp. 239-260, Mar. 1994.
[13] F.P. Kelly, "Notes on Effective Bandwidths," Stochastic Networks: Theory and Applications, F.P. Kelly, S. Zachary, and I. Ziedins, eds., pp. 141-168, Oxford Univ. Press, 1996.
[14] D.V. Lindley, "The Theory of Queues with a Single Server," Math. Proc. Cambridge Philosophical Soc., vol. 48, pp. 277-289, Apr. 1952.
[15] R.M. Loynes, "The Stability of a Queue with Non-Independent Inter-Arrival and Service Times," Math. Proc. Cambridge Philosophical Soc., vol. 58, pp. 497-520, July 1962.
[16] C.-S. Chang, "Stability, Queue Length and Delay of Deterministic and Stochastic Queuing Networks," IEEE Trans. Automatic Control, vol. 39, no. 5, pp. 913-931, May 1994.
[17] R.L. Cruz, "A Calculus for Network Delay, Part I: Network Elements in Isolation," IEEE Trans. Information Theory, vol. 37, no. 1, pp. 114-131, Jan. 1991.
[18] N. McKeown, V. Anantharam, and J. Walrand, "Achieving 100 percent Throughput in an Input-Queued Switch," Proc. IEEE INFOCOM '96, pp. 296-302, Mar. 1996.
[19] L.G. Valiant, "A Scheme for Fast Parallel Communication," SIAM J. Computing, vol. 11, pp. 350-361, May 1982.
[20] C.-S. Chang, D.-S. Lee, Y.-J. Shih, and C.-L. You, "Mailbox Switch: A Scalable Two-Stage Switch Architecture for Conflict Resolution of Ordered Packets," IEEE Trans. Comm., vol. 56, no. 1, pp. 136-149, Jan. 2008.
[21] C.-S. Chang and D.-S. Lee, "Quasi-Circuit Switching and Quasi-Circuit Switches," Proc. IEEE Int'l Conf. Information Technology: Research and Education (ITRE '05), June 2005.
[22] N. Chrysos and M. Katevenis, "Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics," Proc. IEEE INFOCOM '06, Apr. 2006.
[23] J. Turner, "An Optimal Non-Blocking Multicast Virtual Circuit Switch," Proc. IEEE INFOCOM '94, June 1994.
[24] C.E. Koksal, "Providing Quality of Service in High Speed Electronic and Optical Switches," PhD dissertation, Massachusetts Inst. of Tech nology, Sept. 2002.
[25] M.J. Neely, E. Modiano, and Y.-S. Cheng, "Logarithmic Delay for $N\times N$ Packet Switches under the Crossbar Constraint," IEEE Trans. Networking, vol. 15, no. 3, pp. 657-668, June 2007.
[26] R.B. Magill, C.E. Robhrs, and R.L. Stevenson, "Output-Queued Switch Emulation by Fabrics with Limited Memory," IEEE J. Selected Areas in Comm., vol. 21, no. 4, pp. 606-615, May 2003.
[27] S.T. Chuang, S. Iyer, and N. McKeown, "Practical Algorithms for Performance Guarantees in Buffered Crossbar Switches," Proc. IEEE INFOCOM '05, Mar. 2005.
[28] Q. Duan and J. Daigle, "Resource Allocation for Quality of Service Provision in Multistage Buffered Crossbar Switches," Elsevier J. Computer Networks, vol. 46, pp. 147-168, Oct. 2004.
[29] Q. Duan, "Quality of Service Provision in Combined Input and Cross-Point Queued Switches without Output Queuing Match," Elsevier J. Computer Comm., vol. 30, pp. 830-840, Feb. 2007.
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