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Assessing Accelerator-Based HPC Reverse Time Migration
January 2011 (vol. 22 no. 1)
pp. 147-162
ASCII Text
x 
 
Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericas, Félix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguade, José María Cela, Mateo Valero, "Assessing Accelerator-Based HPC Reverse Time Migration," IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 1, pp. 147-162, January, 2011.
 
 
BibTex
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@article{ 10.1109/TPDS.2010.144,
author = {Mauricio Araya-Polo and Javier Cabezas and Mauricio Hanzich and Miquel Pericas and Félix Rubio and Isaac Gelado and Muhammad Shafiq and Enric Morancho and Nacho Navarro and Eduard Ayguade and José María Cela and Mateo Valero},
title = {Assessing Accelerator-Based HPC Reverse Time Migration},
journal ={IEEE Transactions on Parallel and Distributed Systems},
volume = {22},
number = {1},
issn = {1045-9219},
year = {2011},
pages = {147-162},
doi = {http://doi.ieeecomputersociety.org/10.1109/TPDS.2010.144},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Parallel and Distributed Systems
TI - Assessing Accelerator-Based HPC Reverse Time Migration
IS - 1
SN - 1045-9219
SP147
EP162
EPD - 147-162
A1 - Mauricio Araya-Polo,
A1 - Javier Cabezas,
A1 - Mauricio Hanzich,
A1 - Miquel Pericas,
A1 - Félix Rubio,
A1 - Isaac Gelado,
A1 - Muhammad Shafiq,
A1 - Enric Morancho,
A1 - Nacho Navarro,
A1 - Eduard Ayguade,
A1 - José María Cela,
A1 - Mateo Valero,
PY - 2011
KW - Reverse time migration
KW - accelerators
KW - GPU
KW - Cell/B.E.
KW - FPGA
KW - geophysics.
VL - 22
JA - IEEE Transactions on Parallel and Distributed Systems
ER -
 
Mauricio Araya-Polo, Barcelona Supercomputing Center, Barcelona
Javier Cabezas, Barcelona Supercomputing Center, Barcelona
Mauricio Hanzich, Barcelona Supercomputing Center, Barcelona
Miquel Pericas, Barcelona Supercomputing Center, Barcelona
Félix Rubio, Barcelona Supercomputing Center, Barcelona
Isaac Gelado, Universitat Politecnica de Catalunya, Barcelona
Muhammad Shafiq, Barcelona Supercomputing Center, Barcelona
Enric Morancho, Universitat Politecnica de Catalunya, Barcelona
Nacho Navarro, Universitat Politecnica de Catalunya, Barcelona
Eduard Ayguade, Barcelona Supercomputing Center, Barcelona
José María Cela, Barcelona Supercomputing Center, Barcelona
Mateo Valero, Barcelona Supercomputing Center, Barcelona
Oil and gas companies trust Reverse Time Migration (RTM), the most advanced seismic imaging technique, with crucial decisions on drilling investments. The economic value of the oil reserves that require RTM to be localized is in the order of 10^{13} dollars. But RTM requires vast computational power, which somewhat hindered its practical success. Although, accelerator-based architectures deliver enormous computational power, little attention has been devoted to assess the RTM implementations effort. The aim of this paper is to identify the major limitations imposed by different accelerators during RTM implementations, and potential bottlenecks regarding architecture features. Moreover, we suggest a wish list, that from our experience, should be included as features in the next generation of accelerators, to cope with the requirements of applications like RTM. We present an RTM algorithm mapping to the IBM Cell/B.E., NVIDIA Tesla and an FPGA platform modeled after the Convey HC-1. All three implementations outperform a traditional processor (Intel Harpertown) in terms of performance (10x), but at the cost of huge development effort, mainly due to immature development frameworks and lack of well-suited programming models. These results show that accelerators are well positioned platforms for this kind of workload. Due to the fact that our RTM implementation is based on an explicit high order finite difference scheme, some of the conclusions of this work can be extrapolated to applications with similar numerical scheme, for instance, magneto-hydrodynamics or atmospheric flow simulations.

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Index Terms:
Reverse time migration, accelerators, GPU, Cell/B.E., FPGA, geophysics.
Citation:
Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericas, Félix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguade, José María Cela, Mateo Valero, "Assessing Accelerator-Based HPC Reverse Time Migration," IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 1, pp. 147-162, Jan. 2011, doi:10.1109/TPDS.2010.144
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