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Tight Bounds for Critical Sections in Processor Consistent Platforms
October 2006 (vol. 17 no. 10)
pp. 1072-1083

Abstract—Most weak memory consistency models are incapable of supporting a solution to mutual exclusion using only read and write operations to shared variables. Processor Consistency-Goodman's version (PC-G) is an exception. Ahamad et al. showed that Peterson's mutual exclusion algorithm is correct for PC-G, but Lamport's bakery algorithm is not. This paper derives a lower bound on the number of and type of (single or multiwriter) variables that a mutual exclusion algorithm must use in order to be correct for PC-G. Specifically, any such solution for n processes must use at least one multiwriter variable and n single-writer variables. Peterson's algorithm for two processes uses one multiwriter and two single-writer variables, and therefore establishes that this bound is tight for two processes. This paper presents a new n{\hbox{-}}{\rm{process}} algorithm for mutual exclusion that is correct for PC-G and achieves the bound for any n. While Peterson's algorithm is fair, this extension to arbitrary n is not fair. Six known algorithms that use the same number and type of variables are shown to fail to guarantee mutual exclusion when the memory consistency model is only PC-G, as opposed to the Sequential Consistency model for which they were designed. A corollary of our investigation is that, in contrast to Sequential Consistency, multiwriter variables cannot be implemented from single-writer variables in a PC-G system.

[1] M. Ahamad, R. Bazzi, R. John, P. Kohli, and G. Neiger, “The Power of Processor Consistency,” Proc. Fifth Int'l Symp. Parallel Algorithms and Architectures, pp. 251-260, June 1993.
[2] H. Attiya, S. Chaudhuri, R. Friedman, and J. Welch, “Shared Memory Consistency Conditions for Non-Sequential Execution: Definitions and Programming Strategies,” SIAM J. Computing, vol. 27, no. 1, pp. 65-89, Feb. 1998.
[3] H. Attiya and R. Friedman, “Limitations of Fast Consistency Conditions for Distributed Shared Memories,” Information Processing Letters, vol. 57, no. 5, pp. 243-248, 1996.
[4] J. Burns, “Symmetry in Systems of Asynchronous Processes,” Proc. 22nd Symp. Foundations of Computer Science, pp. 169-174, 1981.
[5] M. Dubois, C. Scheurich, and F. Briggs, “Memory Access Buffering in Multiprocessors,” Proc. 13th Int'l Symp. Computer Architecture, pp. 434-442, June 1986.
[6] J. Goodman, “Cache Consistency and Sequential Consistency,” Technical Report 61, IEEE Scalable Coherent Interface Working Group, Mar. 1989.
[7] M. Herlihy and J. Wing, “Linearizability: A Correctness Condition for Concurrent Objects,” ACM Trans. Programming Languages and Systems, vol. 12, no. 3, pp. 463-492, July 1990.
[8] L. Higham and J. Kawash, “Critical Sections and Producer/Consumer Queues in Weak Memory Systems,” Proc. 1997 IEEE Int'l Symp. Parallel Architectures, Algorithms, and Networks, pp. 56-63, Dec. 1997.
[9] L. Higham and J. Kawash, “Bounds for Mutual Exclusion with Only Processor Consistency,” Proc. 14th Int'l Conf. Distributed Computing, Oct. 2000.
[10] J. Kawash, “Limitations and Capabilities of Weak Memory Consistency Systems,” PhD dissertation, Dept. of Computer Science, The Univ. of Calgary, Jan. 2000.
[11] J. Kushkin, D. Ofelt, M. Heinrich, J. Heinlein, R. Simoni, K. Gharachorloo, J. Chapin, D. Nakahira, J. Baxter, M. Horowitz, A. Gupta, M. Rosenblum, and J. Hennessy, “The Stanford Flash Multiprocessor,” Proc. 21st Int'l Symp. Computer Architecture, pp. 302-313, Apr. 1994.
[12] L. Lamport, “A New Solution of Dijkstra's Concurrent Programming Problem,” Comm. ACM, vol. 17, no. 8, pp. 453-455, Aug. 1974.
[13] L. Lamport, “How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs,” IEEE Trans. Computers, vol. 28, no. 9, pp. 690-691, Sept. 1979.
[14] L. Lamport, “The Mutual Exclusion Problem (Parts I and II),” J. ACM, vol. 33, no. 2, pp. 313-326, 327-348, Apr. 1986.
[15] D. Lenoski, J. Laudon, K. Gharachorloo, W.-D. Weber, A. Gupta, J. Hennessy, M. Horowitz, and M. Lam, “The Stanford DASH Multiprocessor,” Computer, vol. 25, no. 3, pp. 63-79, Mar. 1992.
[16] R. Lipton and J. Sandberg, “PRAM: A Scalable Shared Memory,” Technical Report 180-88, Dept. of Computer Science, Princeton Univ., Sept. 1988.
[17] G. Peterson, “Myths about the Mutual Exclusion Problem,” Information Processing Letters, vol. 12, no. 3, pp. 115-116, 1981.
[18] M. Raynal, Algorithms for Mutual Exclusion. The MIT Press, 1986.
[19] A. Silberschatz and P. Galv, Operating System Concepts. John Wiley & Sons, Inc., 1999.
[20] N. Verwaal, “Ambiguous Memory Consistency Models,” master's thesis, Dept. of Computer Science, The Univ. of Calgary, 1998.
[21] P. Vitanyi and B. Awerbuch, “Atomic Shared Register Access by Asynchronous Hardware,” Proc. 27th Symp. Foundations of Computer Science, 1986.

Index Terms:
Memory consistency models, mutual exclusion, processor consistency, multiwriter/single-writer variables.
Lisa Higham, Jalal Kawash, "Tight Bounds for Critical Sections in Processor Consistent Platforms," IEEE Transactions on Parallel and Distributed Systems, vol. 17, no. 10, pp. 1072-1083, Oct. 2006, doi:10.1109/TPDS.2006.146
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