This Article 
 Bibliographic References 
 Add to: 
Gemini: An Optical Interconnection Network for Parallel Processing
October 2002 (vol. 13 no. 10)
pp. 1038-1055

Abstract—The Gemini interconnect is a dual technology (optical and electrical) interconnection network designed for use in tightly-coupled multicomputer systems. It consists of a circuit-switched optical data path in parallel with a packet-switched electrical control/data path. The optical path is used for transmission of long data messages and the electrical path is used for switch control and transmission of short data messages. This paper describes the architecture of the interconnection network and related communications protocols. Fairness issues associated with network operation are addressed and a discrete-event simulation model of the entire system is described. Network performance characteristics derived from the simulation model are presented. The results show significant performance benefits when using virtual output queuing and quantify the tradeoffs between throughput and fairness in the system.

[1] T.E. Anderson, S.S. Owicki, J.B. Saxe, and C.P. Thacker, “High Speed Switch Scheduling for Local Area Networks,” ACM Trans. Computer Systerms, vol. 11, no. 4, pp. 319-352, Nov. 1993.
[2] K.E. Batcher, “The Flip network in STARAN,” Proc. 1976 Int'l Conf. Parallel Processing, pp. 65-71, 1976.
[3] J. Bennett and H. Zhang, “$\big. WF^2Q\bigr.$: Worst-Case Fair Weighted Fair Queueing,” Proc. IEEE INFOCOM 96, pp. 120-128, Mar. 1996.
[4] CACI Products Company MODSIM III Reference Manual, Sept. 1997.
[5] J.B. Carter, W.C. Hsieh, L.B. Stoller, M. Swanson, L. Zhang, and S.A. McKee, “Impulse: Memory System Support for Scientific Applications,” J. Scientific Programming, vol. 7, nos. 3-4, pp. 195-209, 1999.
[6] R. Chamberlain, C.S. Baw, M. Franklin, C. Hackmann, P. Krishnamurthy, A. Mahajan, and M. Wrighton, “Evaluating the Performance of Photonic Interconnection Networks,” Proc. 35th Ann. Simulation Symp., Apr. 2002.
[7] R.D. Chamberlain, M.A. Franklin, and R.R. Krchnavek, “Design of an Optically-Interconnected Multiprocessor,” Proc. IEEE Fifth Int'l Conf. Massively Parallel Processing Using Optical Interconnections (MPPOI '98), pp. 114-122, June 1998.
[8] C.S. Baw, R.D. Chamberlain, and M.A. Franklin, “Fair Scheduling in an Optical Interconnection Network,” Proc. Seventh Int'l Symp. Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, pp. 56-65, Oct. 1999.
[9] C.S. Baw, R.D. Chamberlain, M.A. Franklin, and M.G. Wrighton, “TheGeminiInterconnect: Data Path Measurements and Performance Analysis,” Proc. Sixth Int'l Conf. Parallel Interconnects, pp. 21-30, Oct. 1999.
[10] A. Demers, S. Keshav, and S. Shenkar, “Analysis and Simulation of a Fair Queueing Algorithm,” Proc. SIGCOMM, pp. 1-12, 1989.
[11] J. Duato et al., “A High Performance Router Architecture for Interconnection Networks,” Proc. 1996 Int'l Conf. Parallel Processing, pp. 61-68, 1996.
[12] S.J. Golestani, A Self-Clocked Fair Queueing Scheme for Broadband Applications Proc. IEEE INFOCOM, pp. 636-646, June 1994.
[13] J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 1995.
[14] M.J. Karol, M.G. Hluchyj, and S.P. Morgan, “Input versus Output Queueing on a Space-Division Packet Switch,” IEEE Trans. Comm., vol. 35, no. 12, pp. 1347-1356, Dec. 1987.
[15] S. Keshav, An Engineering Approach to Computer Networks. Reading, Mass.: Addison-Wesley, 1997.
[16] J.M. Lebak and A.W. Bojanczyk, “Design and Performance Evaluation of a Portable Parallel Library for Space-Time Adaptive Processing,” IEEE Trans. Parallel and Distributed Systems, vol. 11, no. 3, pp. 287-298, 2000.
[17] S. Lu, V. Bhargavan, and R. Srikant, “Fair Schedulnig in Wireless Packet Networks,” Proc. SIGCOMM '97, 1997.
[18] Lucent Technologies, Guided Wave Optical Switch Products, Preliminary Data Sheet, 1997.
[19] C. Lund, “Optics Inside Future Computers,” Proc. Fourth Int'l Conf. Massively Parallel Processing Using Optical Interconnections, pp. 156-159, June 1997.
[20] N. McKeown, "Scheduling Cells in Input-Queued Cell Switches," doctoral dissertation, Department of Electrical Engineering and Computer Science, University of California, Berkeley, 1995.
[21] N. McKeown, V. Anantharam, and J. Walrand, “Achieving 100% Throughput in an Input-Queued Switch,” Proc. IEEE INFOCOM '96, pp. 296-302, Mar. 1996.
[22] E.J. Murphy, T.O. Murphy, R.W. Irvin, R. Grencavich, G.W. Davis, and G.W. Richards, “Enhanced Performance Switch Arrays for Optical Switching Networks,” Proc. European Conf. Integrated Optics (ECIO), Apr. 1997.
[23] A. Parekh and R.G. Gallager, “A Generalized Processor Sharing Approach to Flow Control in Integrated Services Networks: The Single-Node Case,” IEEE/ACM Trans. Networking, vol. 1, no. 3, pp. 344-357, June 1993.
[24] A.K. Parekh and R.G. Gallager, “A Generalized Processor Sharing Approach to Flow Control in Integrated Services Networks: The Multiple Node Case,” IEEE/ACM Trans. Networking, vol. 2, no. 2, pp. 137-150, Apr. 1994.
[25] B. Prabhakar and N. McKeown, “On the Speedup Required for Combined Input and Output Queued Switching,” Technical Report CSL-TR-97-738, Stanford Univ., Nov. 1997.
[26] C. Salisbury and R. Melhem, “Distributed, Dynamic Control of Circuit-Switched Banyan Networks,” Proc. Int'l Parallel Processing Symp., 1998.
[27] C. Salisbury and R. Melhem, “A High Speed Scheduler/Controller for Unbuffered Banyan Networks,” Proc. IEEE Int'l Conf. Comm., 1998.
[28] M. Shreedhar, “Efficient Fair Queueing Using Deficit Round Robin,” Master's thesis, Washington Univ., Dec. 1994.
[29] M. Shreedhar and G. Varghese, "Efficient Fair Queuing using Deficit Round Robin," ACM Computer Comm. Review, Vol. 25, No. 4, 1995, pp. 231-242.
[30] S. Suri, G. Varghese, and G. Chandranmenon, “Leap Forward Virtual Clock: An O(log log N) Queuing Scheme with Guaranteed Delays and Throughput Fairness,” Proc. IEEE INFOCOM, Apr. 1997.
[31] Y. Yeh, M. Hluchyj, and A. Acampora, “The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet Switching,” IEEE J. Selected Areas in Comm., vol. 5, no. 8, pp. 1274-1287, Oct. 1987.
[32] X. Yuan, R. Melhem, and R. Gupta, “Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Network,” IEEE Trans. Computers, pp. 1355-1363, Dec. 1999.
[33] L. Zhang,“Virtual Clock: A new traffic control algorithm forpacket-switched networks,” ACM Trans. Computer Systems, vol. 9, no. 2, pp. 101-124, May 1991.

Index Terms:
Optical communication, multiprocessor interconnection networks, fair scheduling protocols, performance evaluation.
Roger D. Chamberlain, Mark A. Franklin, Ch'ng Shi Baw, "Gemini: An Optical Interconnection Network for Parallel Processing," IEEE Transactions on Parallel and Distributed Systems, vol. 13, no. 10, pp. 1038-1055, Oct. 2002, doi:10.1109/TPDS.2002.1041880
Usage of this product signifies your acceptance of the Terms of Use.