This Article 
 Bibliographic References 
 Add to: 
An Analytical Model on the Blocking Probability of a Fault-Tolerant Network
October 1999 (vol. 10 no. 10)
pp. 1040-1051

Abstract—The well-known Clos network has been extensively used for telephone switching, multiprocessor interconnection and data communications. Much work has been done to develop analytical models for understanding the routing blocking probability of the Clos network. However, none of the analytical models for estimating the blocking probability of this type of network have taken into account the very real possibility of the interstage links in the network failing. In this paper, we consider the routing between arbitrary network inputs and outputs in the Clos network in the presence of interstage link faults. In particular, we present an analytical model for the routing blocking probability of the Clos network which incorporates the probability of interstage link failure to allow for a more realistic and useful determination of the approximation of blocking probability. We also conduct extensive simulations to validate the model. Our analytical and simulation results demonstrate that for a relatively small interstage link failure probability, the blocking behavior of the Clos network is similar to that of a fault-free network, and indicate that the Clos network has a good fault-tolerant capability. The new integrated analytical model can guide network designers in the determination of the effects of network failure on the overall connecting capability of the network and allows for the examination of the relationship between network utilization and network failure.

[1] C. Clos, “A Study of Nonblocking Switching Networks,” The Bell System Technical J., vol. 32, pp. 406-424, 1953..
[2] A. Itoh et al., “Practical Implementation and Packaging Technologies for a Large-Scale ATM Switching System,” IEEE J. Selected Areas in Comm., vol. 9, no. 8, pp. 1,280-1,288, Oct. 1991.
[3] M.T. Bruggencate and S. Chalasani, “Equivalence between SP2 High-Performance Switches and Three-Stage Clos Networks,” Proc. 25th Int'l Conf. Parallel Processing, pp. I-1–I-8, Bloomingdale, Ill., 1996.
[4] K. Padmanabhan and D.H. Lawrie,“A Class of Redundant Path Multistage Interconnection Networks,” IEEE Trans. Computers, vol. 32, no. 12, pp. 1,099-1,108, Dec. 1983.
[5] R.J. McMillen and H.J. Siegel, “Performance and Fault Tolerance Improvements in the Inverse Augmented Data Manipulator Network,” Proc, Ninth Symp. Computer Architecture, pp. 63-72, Apr. 1982.
[6] C.P. Kruskal and M. Snir, “The Performance of Multistage Interconnection Networks for Multiprocessors,” IEEE Trans. Computers, vol. 32, no. 12, pp. 1,091-1,098, Dec. 1983.
[7] F.T. Leighton and B.M. Maggs, “Fast Algorithms for Routing around Faults in Multibutterflies and Randomly-Wired Splitter Networks,” IEEE Trans. Computers, vol. 41, no. 5, pp. 578-587, May 1992.
[8] G.B. Adams,D.P. Agarwal, and H.J. Siegel,"Fault-Tolerant Multistage Interconnection Networks," Computer, pp. 14-27, June 1987.
[9] S. Rai and D.P. Agrawal, Distributed Computing Network Reliability. Los Alamitos, Calif.: IEEE CS Press, 1990.
[10] A. Varma and C.S. Raghavendra,"Reliability Analysis of Redundant-Path Interconnection Networks," IEEE Trans. Reliability, pp. 130-137, Apr. 1989.
[11] J.T. Blake and K.S. Trivedi,"Reliability Analysis of Interconnection Networks Using Hierarchical Composition," IEEE Trans. Computers, pp. 1,600-1,604, Nov. 1989.
[12] X. Cheng and O.C. Ibe, “Reliability of a Class of Multistage Interconnection Networks,” IEEE Trans. Parallel and Distributed Systems, vol. 3, no. 2, pp. 241-246, Mar. 1992.
[13] C. Jacobaeus, “A Study on Congestion in Link Systems,” Ericsson Technics, vol. 51, no. 3, 1950.
[14] C.Y. Lee, “Analysis of Switching Networks,” The Bell System Technical J., vol. 34, no. 6, pp. 1,287-1,315, Nov. 1955.
[15] M. Karnaugh, “Loss of Point-to-Point Traffic in Three-Stage Circuit Switches,” IBM J. Research and Development, vol. 18, pp. 204-216, 1974.
[16] P.M. Lin, B.J. Leon, and C.R. Stewart, “Analysis of Circuit-Switched Networks Employing Originating Office Control with Spill Forward,” IEEE Trans. Computers, vol. 26, no. 6, pp. 754-765, June 1978.
[17] Y. Mun, H.Y. Youn, “Performance Modeling and Evaluation of Circuit Switching Using Clos Networks,” IEEE Trans. Computers, vol. 43, pp. 854-861, 1994.
[18] Y. Yang, “An Analytical Model on Network Blocking Probability,” IEEE Comm. Letters, vol. 1, no. 5, pp. 143-145, Sept. 1997.
[19] Y. Yang and J. Wang, “On Blocking Probability of Multicast Networks,” IEEE Trans. Comm., vol. 46, no. 7, pp. 957-968, July 1998.
[20] V.E. Benes, Math. Theory of Connecting Networks and Telephone Traffic. New York: Academic Press, 1965.
[21] Y. Yang and J. Wang, “Wide-Sense Nonblocking Clos Networks under Packing Strategy,” IEEE Trans. Computers, vol. 48, no. 3, pp. 265-284, Mar. 1999.
[22] F.K. Hwang and A. Jajszczyk, “On Nonblocking Multiconnection Networks,” IEEE Trans. Comm., vol. 34, pp. 1,038-1,041, 1986.
[23] Y. Yang, G.M. Masson, “Nonblocking Broadcast Switching Networks,” IEEE Trans. Computers, vol. 40, pp. 1,005-1,015, 1991.
[24] A. Varma and S. Chalasani, “Asymmetrical Multiconnection Three-Stage Clos Networks,” Networks, vol. 23, pp. 427-439, John Wiley&Sons, 1993.
[25] Y. Yang, “A Class of Interconnection Networks for Multicasting,” IEEE Trans. Computers, vol. 47, no. 8, pp. 899-906, Aug. 1998.

Index Terms:
Multistage interconnection networks, performance analysis, analytical model, fault tolerance, blocking probability, Clos network, random routing.
Mathew P. Haynos, Yuanyuan Yang, "An Analytical Model on the Blocking Probability of a Fault-Tolerant Network," IEEE Transactions on Parallel and Distributed Systems, vol. 10, no. 10, pp. 1040-1051, Oct. 1999, doi:10.1109/71.808147
Usage of this product signifies your acceptance of the Terms of Use.