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Loop Transformations for Fault Detection in Regular Loops on Massively Parallel Systems
December 1996 (vol. 7 no. 12)
pp. 1238-1249

Abstract—Distributed-memory systems can incorporate thousands of processors at a reasonable cost. However, with an increasing number of processors in a system, fault detection and fault tolerance become critical issues. By replicating the computation on more than one processor and comparing the results produced by these processors, errors can be detected. During the execution of a program, due to data dependencies, typically not all of the processors in a multiprocessor system are busy at all times. Therefore processor schedules contain idle time slots and it is the goal of this work to exploit these idle time slots to schedule duplicated computation for the purpose of fault detection. We propose a compiler-assisted approach to fault detection in regular loops on distributed-memory systems. This approach achieves fault detection by duplicating the execution of statement instances. After carefully analyzing the data dependencies of a regular loop, selected instances of loop statements are duplicated in a way that ensures the desired fault coverage. We first present duplication strategies for fault detection and show that these strategies use idle processor times for executing replicated statements, whenever possible. Next, we present loop transformations to implement these fault-detection strategies. Also, a general framework for selecting appropriate loop transformations is developed. Experimental results performed on the CRAY-T3D show that the overhead of adding the fault detection capability is usually less than 25%, and is less than 10% when communication overhead is reduced by grouping messages.

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Index Terms:
Compiler-assisted approach, data dependence analysis, distributed-memory systems, duplicating execution, execution pattern, fault detection, loop transformation.
Citation:
Chun Gong, Rami Melhem, Rajiv Gupta, "Loop Transformations for Fault Detection in Regular Loops on Massively Parallel Systems," IEEE Transactions on Parallel and Distributed Systems, vol. 7, no. 12, pp. 1238-1249, Dec. 1996, doi:10.1109/71.553273
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