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An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid
August 1996 (vol. 7 no. 8)
pp. 855-860

Abstract—In this paper, a memory system is introduced for the efficient construction of a Gaussian pyramid. The memory system consists of an address calculating circuit, an address routing circuit, a memory module selection circuit, and $2^n+1$ memory modules. The memory system provides parallel access to $2^n$ image points whose patterns are a block, a row or a column, where the interval of the column and the block is 1 and the interval of the row is $2^l,l\ge 0.$.

The performance of a generic SIMD(Single-Instruction Multiple-Data) processor using the proposed memory system is compared with one using an interleaved memory system for the construction of a Gaussian pyramid. The ratio of the time of the construction of level 2 and level 10 from the original image (level 0) of an SIMD processor with an interleaved memory system to that of the proposed memory system is 1.485 and 1.633, respectively.

[1] S. Tanimoto and T. Pavlidis, "A Hierarchical Data Structure for Picture Processing," Computer Vision, Graphics, Image Processing, vol.4, pp. 104-119, 1975.
[2] P.J. Burt, "Fast Filter Transforms for Image Processing," Computer Vision, Graphics, Image Processing, vol.16, pp. 20-51, 1981.
[3] P.J. Burt, "Fast Algorithms for Estimating Local Image Properties," Computer Vision, Graphics, Image Processing, vol. 21, pp. 368-382, 1983.
[4] A. Rosenfeld, Multiresolution image processing and analysis, Springer-Verlag, 1984.
[5] J.W. Park, "An Efficient Memory System for Image Processing," IEEE Trans. Computers, vol. 35, pp. 669-674, July 1986.
[6] P. Budnik and D.J. Kuck, "The Organization and Use of Parallel Memories," IEEE Trans Computers, vol. 20, pp. 1,566-1,569, Dec. 1971.
[7] D.H. Lawrie, "Access and Alignment of Data in an Array Processor," IEEE Trans. Computers, vol. 24, pp. 1,145-1,155, Dec. 1975.
[8] D.C. Van Voorhis and T.H. Morrin, "Memory System for Image Processing", IEEE Trans Computers, vol. 27, pp. 113-124, Feb. 1978.
[9] D.H. Lawrie and C.R. Vora, "The Prime Memory System for Array Access", IEEE Trans Computers, vol. 31, pp. 435-442, May 1982.
[10] A. Norton and E. Melton, "A Class of Boolean Linear Transformations for Conflict-Free Power-of-Two Stride Access," Proc., Int'l Conf. Parallel Processing, pp. 247-254, 1987.
[11] C.S. Raghavendra and R. Boppana, "On Methods for Fast and Efficient Parallel Memory Access", Proc. Int'l Conf. Parallel Processing, pp. 76-83, 1990.
[12] N.B. MacDonald, "An Overview of SIMD Parallel System: AMT DAP, Thinking Machines CM-200, and MasPar MP-1", The WorkShop on Parallel Computing, Apr. 1992.
[13] G. Ramanathan and J. Oren, "Survey of Commercial Parallel Machines", Dept. of Computer Science, Oregon State Univ.

Index Terms:
SIMD memory architecture, parallel memory systems, address calculating circuit, data routing circuit, Gaussian pyramid algorithms, image processing.
Citation:
Jong Won Park, David T. Harper, III, "An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid," IEEE Transactions on Parallel and Distributed Systems, vol. 7, no. 8, pp. 855-860, Aug. 1996, doi:10.1109/71.532116
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