Issue No.08 - August (1996 vol.7)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/71.532109
<p><b>Abstract</b>—Many large-scale scientific and engineering computations, e.g., some of the Grand Challenge problems [<ref rid="bibl07691" type="bib">1</ref>], spend a major portion of execution time in their core loops computing band linear recurrences (BLRs). Conventional compiler parallelization techniques[<ref rid="bibl07694" type="bib">4</ref>] cannot generate scalable parallel code for this type of computation because they respect loop-carried dependences (LCDs) in programs, and there is a limited amount of parallelism in a BLR with respect to LCDs. For many applications, using library routines to replace the core BLR requires the separation of BLR from its dependent computation, which usually incurs significant overhead. In this paper, we present a new scalable algorithm, called the <it>Regular Schedule</it>, for parallel evaluation of BLRs. We describe our implementation of the Regular Schedule and discuss how to obtain maximum memory throughput in implementing the schedule on vector supercomputers. We also illustrate our approach, based on our Regular Schedule, to parallelizing programs containing BLR and other kinds of code. Significant improvements in CPU performance for a range of programs containing BLR implemented using the Regular Schedule in C over the same programs implemented using highly optimized coded-in-assembly BLAS routines [<ref rid="bibl076911" type="bib">11</ref>] are demonstrated on Convex C240. Our approach can be used both at the user level in parallel programming code containing BLRs, and in compiler parallelization of such programs combined with recurrence recognition techniques for vector supercomputers.</p>
Band linear recurrences (BLRs), parallel evaluation of BLRs with resource constraints, programs with BLRs, parallel programming, vector supercomputer.
Haigeng Wang, Alexandru Nicolau, Stephen Keung, Kai-Yeung (Sunny) Siu, "Computing Programs Containing Band Linear Recurrences on Vector Supercomputers", IEEE Transactions on Parallel & Distributed Systems, vol.7, no. 8, pp. 769-782, August 1996, doi:10.1109/71.532109