Issue No.06 - June (1996 vol.7)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/71.506698
<p><b>Abstract</b>—The disparity between the processing speed and the data access rates presents a serious bottleneck in pipelined/vector processors. The memory bank conflict in interleaved system can be alleviated by skewing, for scientific computations performing functions on varieties of submatrices. So far <it>uniskewing</it> involving periodic and linear functions have been studied. Several difficulties encountered in such schemes are that they require a prime number of memory modules, may create wasted memory space, or addressing functions and the alignment network become complex. We present a new technique, termed <it>multiskewing</it>, which applies multiple functions on different sections of the array. Each of these functions may be as simple as a linear shift. We show that some of the advantages are that it does not require a prime number of memory, memory utilization factor is 100%, maintains the logical structure of the array, and allows optimal memory access of a large class of submatrices.</p>
Interleaved memory, pipelined/vector processors, matrix computation, skewing schemes, periodic, linear schemes, memory bandwidth, memory bank conflict, conflict-free access.
Ashoke Deb, "Multiskewing-A Novel Technique for Optimal Parallel Memory Access", IEEE Transactions on Parallel & Distributed Systems, vol.7, no. 6, pp. 595-604, June 1996, doi:10.1109/71.506698