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Multiskewing-A Novel Technique for Optimal Parallel Memory Access
June 1996 (vol. 7 no. 6)
pp. 595-604

Abstract—The disparity between the processing speed and the data access rates presents a serious bottleneck in pipelined/vector processors. The memory bank conflict in interleaved system can be alleviated by skewing, for scientific computations performing functions on varieties of submatrices. So far uniskewing involving periodic and linear functions have been studied. Several difficulties encountered in such schemes are that they require a prime number of memory modules, may create wasted memory space, or addressing functions and the alignment network become complex. We present a new technique, termed multiskewing, which applies multiple functions on different sections of the array. Each of these functions may be as simple as a linear shift. We show that some of the advantages are that it does not require a prime number of memory, memory utilization factor is 100%, maintains the logical structure of the array, and allows optimal memory access of a large class of submatrices.

[1] F. Baskett and A.J. Smith, "Interference in Multiprocessor Computer Systems with Interleaved Memory," Comm. ACM, vol. 19, pp. 327-334, June 1976.
[2] K.E. Batcher, "The Multi-Dimensional Access MEMORY in STARAN," IEEE Trans. Computers, vol. 26, no. , pp. 174-177, Feb. 1977.
[3] D.H. Bailey, "Vector Computer Memory Bank Contention," IEEE Trans. Computers, vol. 36, no. 3, pp. 293-298, Mar. 1987.
[4] P. Budnik and D.J. Kuck, "The Organization and Use of Parallel Memories," IEEE Trans. Computers, vol. 20, no. 12, pp. 1,566-1,569, Dec. 1971.
[5] A. Deb, "A Regular Non-Periodic Skewing Scheme for Optimal Conflict-Free Memory Access," IFIP Congress 80, North-Holland, 1980.
[6] D.H. Lawrie and C.R. Vora, "The Prime Memory System for Array Access," IEEE Trans. Computers, vol. 31, no. 5, pp. 435-442, May 1982.
[7] D.H. Lawrie, "Access and Alignment of Data in an Array Processor," IEEE Trans. Computers, vol. 24, no. 12, pp. 1,145-1,155, Dec 1975.
[8] C.V. Ravi, "On the Bandwidth and Interference in Interleaved Memory System," IEEE Trans. Computers, vol. 21, Aug. 1972.
[9] R.A. Stokes, "Burroughs Scientific Processor," High Speed Computer and Algorithm Organization, Kuck et al., eds. Academic Press, 1977.
[10] H.D. Shapiro, "Theoretical Limitations on the Use of Parallel Memories," PhD thesis, Univ. of Illinois at Urbana-Champaign, Dept. of Computer Science, Technical Report 75-776, Dec. 1975.
[11] G. Tel and H.A.G. Wijshoff, "Hierarchical Parallel Memory Systems and Multiperiodic Skewing Schemes," J. Parallel and Distributed Computing, vol. 7 no. 2, pp. 355-367, Oct. 1989.
[12] H.A.G. Wijshoff and J. Van Leeuwen, "On Linear Skewing Schemes and d-Ordered Vectors," IEEE Trans. Computers, vol. 36, no. 2, pp. 233-239, Feb. 1987.
[13] H.A.G. Wijshoff, Data Organization in Parallel Computers. Kluwer Academic, 1989.

Index Terms:
Interleaved memory, pipelined/vector processors, matrix computation, skewing schemes, periodic, linear schemes, memory bandwidth, memory bank conflict, conflict-free access.
Citation:
Ashoke Deb, "Multiskewing-A Novel Technique for Optimal Parallel Memory Access," IEEE Transactions on Parallel and Distributed Systems, vol. 7, no. 6, pp. 595-604, June 1996, doi:10.1109/71.506698
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