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A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
May 1995 (vol. 6 no. 5)
pp. 482-497
ASCII Text
x 
 
Patrick T. Gaughan, Sudhakar Yalamanchili, "A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks," IEEE Transactions on Parallel and Distributed Systems, vol. 6, no. 5, pp. 482-497, May, 1995.
 
 
BibTex
x
 
@article{ 10.1109/71.382317,
author = {Patrick T. Gaughan and Sudhakar Yalamanchili},
title = {A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks},
journal ={IEEE Transactions on Parallel and Distributed Systems},
volume = {6},
number = {5},
issn = {1045-9219},
year = {1995},
pages = {482-497},
doi = {http://doi.ieeecomputersociety.org/10.1109/71.382317},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Parallel and Distributed Systems
TI - A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
IS - 5
SN - 1045-9219
SP482
EP497
EPD - 482-497
A1 - Patrick T. Gaughan,
A1 - Sudhakar Yalamanchili,
PY - 1995
VL - 6
JA - IEEE Transactions on Parallel and Distributed Systems
ER -
 

Abstract—Our goal is to reconcile the conflicting demands of performance and fault-tolerance in interprocessor communication. To this end, we propose a pipelined communication mechanism—pipelined circuit-switching (PCS)—which is a variant of the well known wormhole routing (WR) mechanism. PCS relaxes some of the routing constraints imposed by WR and as a result enables routing behavior that cannot otherwise be realized. This paper presents a new class of adaptive routing algorithms—misrouting backtracking with $m$ misroutes (MB-$m$). This class of routing algorithms is made possible by PCS. We provide an analysis of the performance and static fault-tolerant properties of MB-$m$. The results of an experimental evaluation of PCS and MB-3 are also presented. This methodology provides performance approaching that of WR, while realizing a level of resilience to static faults that is difficult to achieve with WR.

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Citation:
Patrick T. Gaughan, Sudhakar Yalamanchili, "A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks," IEEE Transactions on Parallel and Distributed Systems, vol. 6, no. 5, pp. 482-497, May 1995, doi:10.1109/71.382317
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