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Issue No.01 - January (1995 vol.6)
pp: 105-110
ABSTRACT
<p><it>Abstract—</it>This short note presents constant-time algorithms for labeling the connected components of an image on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which employs constant-weight codes. The use of such codes enables identifying a single representative processor for each component in a constant number of steps. The proposed algorithms can label an <math><tmath>$N\times N$</tmath></math> image in <math><tmath>$O$</tmath></math>(1) time using <math><tmath>$N^2$</tmath></math> processors, which is optimal. Furthermore, the proposed techniques lead to an <math><tmath>$O(\hbox{\bf log}\, N /\hbox{\bf log}\,\hbox{\bf log}\, N)$</tmath></math>-time image labeling algorithm on a network of <math><tmath>$N^2$</tmath></math> processors with a reconfigurable bus of width <math><tmath>$\hbox{\bf log}\, N$</tmath></math> bits. It is shown that these techniques can be applied to labeling an undirected <math><tmath>$N$</tmath></math>-vertex graph represented by an adjacency matrix.</p><p><it>Index Terms—</it>Reconfigurable networks of processors, parallel processing, constant-time algorithms, constant-weight codes, labeling connected components, image computations, graphs, array processing.</p>
CITATION
Hussein M. Alnuweiri, "Parallel Constant-Time Connectivity Algorithms on a Reconfigurable Network of Processors", IEEE Transactions on Parallel & Distributed Systems, vol.6, no. 1, pp. 105-110, January 1995, doi:10.1109/71.363405
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