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Parallel Constant-Time Connectivity Algorithms on a Reconfigurable Network of Processors
January 1995 (vol. 6 no. 1)
pp. 105-110

Abstract—This short note presents constant-time algorithms for labeling the connected components of an image on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which employs constant-weight codes. The use of such codes enables identifying a single representative processor for each component in a constant number of steps. The proposed algorithms can label an $N\times N$ image in $O$(1) time using $N^2$ processors, which is optimal. Furthermore, the proposed techniques lead to an $O(\hbox{\bf log}\, N /\hbox{\bf log}\,\hbox{\bf log}\, N)$-time image labeling algorithm on a network of $N^2$ processors with a reconfigurable bus of width $\hbox{\bf log}\, N$ bits. It is shown that these techniques can be applied to labeling an undirected $N$-vertex graph represented by an adjacency matrix.

Index Terms—Reconfigurable networks of processors, parallel processing, constant-time algorithms, constant-weight codes, labeling connected components, image computations, graphs, array processing.

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Hussein M. Alnuweiri, "Parallel Constant-Time Connectivity Algorithms on a Reconfigurable Network of Processors," IEEE Transactions on Parallel and Distributed Systems, vol. 6, no. 1, pp. 105-110, Jan. 1995, doi:10.1109/71.363405
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