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Issue No.11 - November (1994 vol.5)
pp: 1210-1220
<p>The binary hypercube has been one of the most frequently chosen interconnectionnetworks for parallel computers because it provides low diameter and is so robust that itcan very efficiently emulate a wide variety of other frequently used networks. However,the major drawback of the hypercube is the increase in the number of communicationchannels for each processor with an increase in the total number of processors in thesystem. This drawback has a direct effect on the very large scale integration complexityof the hypercube network. This short note proposes a new topology that is producedfrom the hypercube by a uniform reduction in the number of edges for each node. Thisedge reduction technique produces networks with lower complexity than hypercubeswhile maintaining, to a high extent, the powerful hypercube properties. An extensivecomparison of the proposed reduced hypercube (RH) topology with the conventionalhypercube is included. It is also shown that several copies of the popularcube-connected cycles network can be emulated simultaneously by an RH with dilation 1.</p>
Index Termshypercube networks; parallel architectures; VLSI; computational complexity; reducedhypercube interconnection networks; RH; binary hypercube; parallel computers; lowdiameter; communication channels; very large scale integration complexity; topology;edge reduction technique; lower complexity; reduced hypercube topology; popularcube-connected cycles network
S.G. Ziavras, "RH: A Versatile Family of Reduced Hypercube Interconnection Networks", IEEE Transactions on Parallel & Distributed Systems, vol.5, no. 11, pp. 1210-1220, November 1994, doi:10.1109/71.329667
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