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Issue No.07 - July (1994 vol.5)
pp: 720-736
ABSTRACT
<p>This paper presents a hierarchical approach for compiling macro dataflow graphs formultiprocessors with local memory. Macro dataflow graphs comprise several nodes (ormacro operations) that must be executed subject to prespecified precedence constraints.Programs consisting of multiple nested loops, where the precedence constraints betweenthe loops are known, can be viewed as macro dataflow graphs. The hierarchicalcompilation approach comprises a processor allocation phase followed by a partitioningphase. In the processor allocation phase, using estimated speedup functions for themacro nodes, computationally efficient techniques establish the sequencing andparallelism of macro operations for close-to-optimal run-times. The second phasepartitions the computations in each macro node to maximize communication locality forthe level of parallelism determined by the processor allocation phase. The same approachcan also be used for programs consisting of multiple loop nests, when each of the nestedloops can be characterized by a speedup function. These ideas have been implemented ina prototype structure-driven compiler, SDC, for expressions of matrix operations. Thepaper presents the performance of the compiler for several matrix expressions on asimulator of the Alewife multiprocessor.</p>
INDEX TERMS
Index Termsmultiprocessing systems; program compilers; performance evaluation; hierarchicalcompilation; macro dataflow graphs; local memory; macro operations; precedenceconstraints; multiple nested loops; processor allocation; partitioning phase;close-to-optimal run-times; nested loops; prototype structure-driven compiler; SDC;performance; simulator; Alewife multiprocessor
CITATION
G.N. Srinivasa Prasanna, A. Agrawal, B.R. Musicus, "Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory", IEEE Transactions on Parallel & Distributed Systems, vol.5, no. 7, pp. 720-736, July 1994, doi:10.1109/71.296318
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