|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
| ASCII Text | x | ||
| P. Agrawal, A. Ng, "Computing Network Flow on a Multiple Processor Pipeline," IEEE Transactions on Parallel and Distributed Systems, vol. 5, no. 6, pp. 653-658, June, 1994. | |||
| BibTex | x | ||
| @article{ 10.1109/71.285611, author = {P. Agrawal and A. Ng}, title = {Computing Network Flow on a Multiple Processor Pipeline}, journal ={IEEE Transactions on Parallel and Distributed Systems}, volume = {5}, number = {6}, issn = {1045-9219}, year = {1994}, pages = {653-658}, doi = {http://doi.ieeecomputersociety.org/10.1109/71.285611}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Parallel and Distributed Systems TI - Computing Network Flow on a Multiple Processor Pipeline IS - 6 SN - 1045-9219 SP653 EP658 EPD - 653-658 A1 - P. Agrawal, A1 - A. Ng, PY - 1994 KW - Index Termspipeline processing; distributed algorithms; graph theory; network flow; multiple processor pipeline; maximum flow; Goldberg-Tarjan algorithm; parallel implementations; network graph; partitioned algorithm; six processors; message-passing multicomputer; performance estimates VL - 5 JA - IEEE Transactions on Parallel and Distributed Systems ER - | |||
We demonstrate the feasibility of a distributed implementation of the Goldberg-Tarjan algorithm for finding the maximum flow in a network. Unlike other parallel implementations of this algorithm, where the network graph is partitioned among many processors, we partition the algorithm among processors arranged in a pipeline. The network graph data are distributed among the processors according to local requirements. The partitioned algorithm is implemented on six processors within a 15-processor pipelined message-passing multicomputer operating at 5 MHz. We used randomly generated networks with integer capacities as examples. Performance estimates based upon a six-processor pipelined implementation indicated a speedup between 3.8 and 5.9 over a single processor.
[1] P. Agrawal and W. J. Dally, "A hardware logic simulation system,"IEEE Trans. Comput.- Aided Design of Circuits Syst., vol. 9, pp. 19-29, Jan. 1990.
[2] F. Alizadeh and A. V. Goldberg, "Experiments with the push-relabel method for the maximum flow problem on a connection machine,"DIMACS Implementation Challenge Workshop: Network Flows and Matching, Tech. Rep. 92-4, pp. 56-71, Sept. 1991.
[3] R. J. Anderson and J. C. Setubal, "Parallel and sequential implementations of maximum-flow algorithms,"DIMACS Implementation Challenge Workshop: Network Flows and Matching, Tech. Rep. 924, pp. 17-41, Sept. 1991.
[4] J. Cheriyan and S. N. Maheshwari, "Analysis of preflow push algorithms for maximum network flow,"SIAM J. Comput., vol. 18, pp. 1057-1086, 1989.
[5] A. Goldberg and R. Tarjan, "A new approach to the maximum flow problem," inProc. 18th ACM Symp. Theory Comput., 1986, pp. 136-146.
[6] A. V. Goldberg, "Efficient graph algorithms for sequential and parallel computers," Tech. Rep. TR-374, Lab. for Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, 1987.
[7] A. V. Goldberg, "Processor-efficient implementation of a network flow algorithm," Tech. Rep. STAN-CS-90-1301, Dept. of Comput. Sci., Stanford Univ., Palo Alto, CA, 1990.
[8] A. V. Karzanov, "Determining the maximum flow in a network by the method of preflows,"Soviet Math. Dokl., vol. 15, pp. 43-37, 1974.
[9] E. L. Lawler, Combinatorial Optimization, Networks and Matroids. New York: Holt, Rinehart and Winston, 1976.
[10] K. J. Singh, A. R. Wang, R. K. Brayton, and A. L. Sangiovanni-Vincentelli, "Timing optimization in combinational circuits,"IEEE Int. Conf. Comput.-Aided Design, 1988, pp. 282-285.