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A Sliding Memory Plane Array Processor
June 1993 (vol. 4 no. 6)
pp. 601-612

A mesh-connected single-input multiple-data (SIMD) architecture called a sliding memory plane (SliM) array processor is proposed. Differing from existing mesh-connected SIMD architectures, SliM has several salient features such as a sliding memory plane that provides inter-PE communication during computation. Two I/O planes provide an I/O overlapping capability. Thus, inter-PE communication and I/O overhead can be overlapped with computation. Inter-PE communication time is invisible in most image processing tasks because the computation time is larger than the communication time on SliM. The ability to overlap inter-PE communication with computation, regardless of window size and shape and without using a coprocessor or an on-chip DMA controller is unique to SliM.

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Index Terms:
Index Termssliding memory; plane array processor; mesh-connected; single-input multiple-data; SliM; image processing; image processing; parallel architectures
Citation:
M.H. Sunwoo, J.K. Aggarwal, "A Sliding Memory Plane Array Processor," IEEE Transactions on Parallel and Distributed Systems, vol. 4, no. 6, pp. 601-612, June 1993, doi:10.1109/71.242162
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