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Issue No.01 - January (1990 vol.1)
pp: 91-106
<p>A discussion is presented of two ways of mapping the cells in a two-dimensional area of a chip onto processors in an n-dimensional hypercube such that both small and large cell moves can be applied. Two types of move are allowed: cell exchanges and cell displacements. The computation of the cost function in parallel among all the processors in the hypercube is described, along with a distributed data structure that needs to be stored in the hypercube to support such a parallel cost evaluation. A novel tree broadcasting strategy is presented for the hypercube that is used extensively in the algorithm for updating cell locations in the parallel environment. A dynamic parallel annealing schedule is proposed that estimates the errors due to interacting parallel moves and adapts the rate of synchronization automatically. Two novel approaches in controlling error in parallel algorithms are described: heuristic cell coloring and adaptive sequence control. The performance on an Intel iPSC-2/D4/MX hypercube is reported.</p>
Index Termsmessage passing; distributed memory; simulated annealing; cell placement; hypercube multiprocessors; two-dimensional area; n-dimensional hypercube; cell exchanges; cell displacements; cost function; distributed data structure; parallel cost evaluation; tree broadcasting strategy; dynamic parallel annealing schedule; errors; synchronization; parallel algorithms; heuristic cell coloring; adaptive sequence control; Intel iPSC-2/D4/MX hypercube; circuit layout CAD; optimisation; parallel algorithms; performance evaluation
P. Banerjee, M.H. Jones, J.S. Sargent, "Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors", IEEE Transactions on Parallel & Distributed Systems, vol.1, no. 1, pp. 91-106, January 1990, doi:10.1109/71.80128
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