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Issue No.04 - April (2013 vol.62)
pp: 631-643
Chih-Yuan Lien , Dept. of Electron. Eng., Nat. Kaohsiung Univ. of Appl. Sci., Kaohsiung, Taiwan
Chien-Chuan Huang , Dept. of Comput. Sci. & Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Pei-Yin Chen , Dept. of Comput. Sci. & Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Yi-Fan Lin , Dept. of Comput. Sci. & Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
ABSTRACT
Images are often corrupted by impulse noise in the procedures of image acquisition and transmission. In this paper, we propose an efficient denoising scheme and its VLSI architecture for the removal of random-valued impulse noise. To achieve the goal of low cost, a low-complexity VLSI architecture is proposed. We employ a decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels. Furthermore, an adaptive technology is used to enhance the effects of removal of impulse noise. Our extensive experimental results demonstrate that the proposed technique can obtain better performances in terms of both quantitative evaluation and visual quality than the previous lower complexity methods. Moreover, the performance can be comparable to the higher,- complexity methods. The VLSI architecture of our design yields a processing rate of about 200 MHz by using TSMC 0.18 μm technology. Compared with the state-of-the-art techniques, this work can reduce memory storage by more than 99 percent. The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications.
INDEX TERMS
VLSI, computational complexity, decision trees, image denoising, image reconstruction, impulse noise, object detection, size 0.18 mum, image denoising architecture, random-valued impulse noise removal, image acquisition, image transmission, VLSI architecture, decision-tree-based impulse noise detector, noisy pixel detection, edge-preserving filter, noisy pixel intensity values reconstruction, adaptive technology, quantitative evaluation, visual quality, TSMC technology, computational complexity, line memory buffers, frequency 200 MHz, Noise, Noise measurement, Image edge detection, Very large scale integration, Computer architecture, Noise reduction, Detectors, architecture, Image denoising, impulse noise, impulse detector
CITATION
Chih-Yuan Lien, Chien-Chuan Huang, Pei-Yin Chen, Yi-Fan Lin, "An Efficient Denoising Architecture for Removal of Impulse Noise in Images", IEEE Transactions on Computers, vol.62, no. 4, pp. 631-643, April 2013, doi:10.1109/TC.2011.256
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