CSDL - IEEE Transactions on Computers

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Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall (Abstract)

Kshitij Sudan, University of Utah, Salt Lake City

Karthick Rajamani, IBM Austin Research Lab, Austin

Wei Huang, IBM Austin Research Lab, Austin

John B. Carter, IBM Austin Research Lab, Austin

pp. 1697-1710

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A Customized Processor for Energy Efficient Scientific Computing (Abstract)

Ankit Sethia, University of Michigan, Ann Arbor

Ganesh Dasika, ARM, Austin

Trevor Mudge, University of Michigan, Ann Arbor

Scott Mahlke, University of Michigan, Ann Arbor

pp. 1711-1723

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Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures (Abstract)

Ardavan Pedram, The University of Texas at Austin, Austin

Robert A. van de Geijn, The University of Texas at Austin, Austin

Andreas Gerstlauer, The University of Texas at Austin, Austin

pp. 1724-1736

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Exploiting Spatio-Temporal Tradeoffs for Energy-Aware MapReduce in the Cloud (Abstract)

Michael Cardosa, University of Minnesota, Minneapolis

Aameek Singh, IBM Almaden Research Center, San Jose

Himabindu Pucha, IBM Almaden Research Center, San Jose

Abhishek Chandra, University of Minnesota, Minneapolis

pp. 1737-1751

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“Cool” Load Balancing for High Performance Computing Data Centers (Abstract)

Osman Sarood, University of Illinois Urbana Champaign, Urbana

Phil Miller, University of Illinois at Urbana-Champaign, Urbana

Ehsan Totoni, University of Illinois at Urbana-Champaign, Urbana

Laxmikant V. Kalé, University of Illinois at Urbana-Champaign, Urbana

pp. 1752-1764

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Power Management for Wireless Data Transmission Using Complex Event Processing (Abstract)

Yu Xiao, Dept. of Comput. Sci. & Eng., Aalto Univ., Aalto, Finland

Wei Li, Dept. of Comput. Sci. & Eng., Aalto Univ., Aalto, Finland

M. Siekkinen, Dept. of Comput. Sci. & Eng., Aalto Univ., Aalto, Finland

P. Savolainen, Helsinki Inst. for Inf. Technol. (HIIT), Univ. of Helsinki, Helsinki, Finland

Antti Ylä-Jääski, Helsinki Inst. for Inf. Technol., Aalto Univ., Aalto, Finland

Pan Hui, Deutsche Telekom Labs., Berlin, Germany

pp. 1765-1777

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Power and Delay Aware Management of Packet Switches (Abstract)

Lykomidis Mastroleon, Stanford University, Stanford

Daniel C. O'Neill, Stanford University, Stanford

Benjamin Yolken, Stanford University, Stanford

Nicholas Bambos, Stanford University, Stanford

pp. 1789-1799

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Optimizing Hardware Design by Composing Utility-Directed Transformations (Abstract)

Qiang Liu, Imperial College London, London

Tim Todman, Imperial College London, London

Wayne Luk, Imperial College London, London

George A. Constantinides, Imperial College London, London

pp. 1800-1812

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A New Subclass of Integer Linear Programming Problems and Its Applications (Abstract)

Yue-Li Wang, National Taiwan University of Science and Technology, Taipei

Cheng-Ju Hsu, Ching Yun University, Taipei

Jia-Jie Liu, Shih Hsin University, Taipei

Ming-Tat Ko, Academia Sinica, Taiwan

Fu-Hsing Wang, Chinese Culture University, Taipei

pp. 1813-1822

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