This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Multilayer Bus Optimization for Real-Time Embedded Systems
Nov. 2012 (vol. 61 no. 11)
pp. 1638-1650
Pi-Cheng Hsiu, Res. Center for Inf. Technol. Innovation (CITI), Taipei, Taiwan
Cheng-Kang Hsieh, Res. Center for Inf. Technol. Innovation (CITI), Taipei, Taiwan
Der-Nien Lee, Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Tei-Wei Kuo, Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan
A major challenge in the design of multicore embedded systems is how to tackle the communications among tasks with performance requirements and precedence constraints. In this paper, we consider the problem of scheduling real-time tasks over multilayer bus systems with the objective of minimizing the communication cost. We show that the problem is NP-hard and determine the best possible approximation ratio of approximation algorithms. First, we propose a polynomial-time optimal algorithm for a restricted case where one multilayer bus, and the unit execution time and communication time are considered. The result is then extended as a pseudopolynomial-time optimal algorithm to consider multiple multilayer buses with arbitrary execution and communication times, as well as different timing constraints and objective functions. We compare the performance of the proposed algorithm with that of some popular heuristics, and provide further insights into the multilayer bus system design.
Index Terms:
system buses,approximation theory,computational complexity,embedded systems,multiprocessing systems,optimisation,scheduling,objective functions,multilayer bus optimization,realtime embedded systems,multicore embedded systems,realtime task scheduling,multilayer bus systems,NP-hard problem,approximation algorithms,pseudopolynomial-time optimal algorithm,timing constraints,Program processors,Bridges,Schedules,Heuristic algorithms,Computer architecture,Real time systems,Embedded systems,bus cost optimization,Program processors,Bridges,Schedules,Heuristic algorithms,Computer architecture,Real time systems,Embedded systems,real-time scheduling,Program processors,Bridges,Schedules,Heuristic algorithms,Computer architecture,Real time systems,Embedded systems,precedence constraints,Multilayer-bus embedded systems
Citation:
Pi-Cheng Hsiu, Cheng-Kang Hsieh, Der-Nien Lee, Tei-Wei Kuo, "Multilayer Bus Optimization for Real-Time Embedded Systems," IEEE Transactions on Computers, vol. 61, no. 11, pp. 1638-1650, Nov. 2012, doi:10.1109/TC.2011.200
Usage of this product signifies your acceptance of the Terms of Use.