The Community for Technology Leaders
RSS Icon
Subscribe
Issue No.09 - Sept. (2012 vol.61)
pp: 1341-1353
Oleg Golubitsky , Google, Inc., Waterloo
Dmitri Maslov , University of Waterloo, Waterloo
ABSTRACT
Optimal synthesis of reversible functions is a nontrivial problem. One of the major limiting factors in computing such circuits is the sheer number of reversible functions. Even restricting synthesis to 4-bit reversible functions results in a huge search space (16! \approx 2^{44} functions). The output of such a search alone, counting only the space required to list Toffoli gates for every function, would require over 100 terabytes of storage. In this paper, we present two algorithms: one, that synthesizes an optimal circuit for any 4-bit reversible specification, and another that synthesizes all optimal implementations. We employ several techniques to make the problem tractable. We report results from several experiments, including synthesis of all optimal 4-bit permutations, synthesis of random 4-bit permutations, optimal synthesis of all 4-bit linear reversible circuits, and synthesis of existing benchmark functions; we compose a list of the hardest permutations to synthesize, and show distribution of optimal circuits. We further illustrate that our proposed approach may be extended to accommodate physical constraints via reporting LNN-optimal reversible circuits. Our results have important implications in the design and optimization of reversible and quantum circuits, testing circuit synthesis heuristics, and performing experiments in the area of quantum information processing.
INDEX TERMS
Reversible circuits, logic synthesis, quantum circuits.
CITATION
Oleg Golubitsky, Dmitri Maslov, "A Study of Optimal 4-Bit Reversible Toffoli Circuits and Their Synthesis", IEEE Transactions on Computers, vol.61, no. 9, pp. 1341-1353, Sept. 2012, doi:10.1109/TC.2011.144
REFERENCES
[1] S. Aaronson and D. Gottesman, “Improved Simulation of Stabilizer Circuits,” Physical Rev. A, vol. 70, no. 5, p. 052328, http://arxiv.org/abs/quant-ph0406196, 2004.
[2] R.P. Feynman, “Quantum Mechanical Computers,” Foundations of Physics, vol. 16, no. 6, pp. 507-531, June 1986.
[3] D. Große et al., “Exact SAT-Based Toffoli Network Synthesis,” Proc. 17th ACM Great Lakes Symp. VLSI, 2007.
[4] P. Gupta et al., “An Algorithm for Synthesis of Reversible Logic Circuits,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 11, pp. 2317-2330, Nov. 2006.
[5] H. Häffner et al., “Scalable Multiparticle Entanglement of Trapped Ions,” Nature, vol. 438, pp. 643-646, http://arxiv.org/abs/quant-ph0603217, Dec. 2005.
[6] P. Kerntopf, “A New Heuristic Algorithm for Reversible Logic Synthesis,” Proc. IEEE Design Automation Conf. (DAC), pp. 834-837, 2004.
[7] D. Maslov, “Reversible Logic Synthesis Benchmarks Page,” http://webhome.cs.uvic.ca~dmaslov/, Jan. 2011.
[8] D. Maslov et al., “Techniques for the Synthesis of Reversible Toffoli Networks,” ACM Trans. Design Automation of Electronic Systems, vol. 12, no. 4, pp. 1-28, http://arxiv.org/abs/quant-ph0607166, Sept. 2007.
[9] D. Maslov and D.M. Miller, “Comparison of the Cost Metrics for Reversible and Quantum Logic Synthesis,” IET Computers and Digital Techniques, vol. 1, no. 2, pp. 98-104, http://arxiv.org/abs/quant-ph0511008, 2007.
[10] M. Matsumoto and T. Nishimura, “Mersenne Twister: A 623-Dimensionally Equidistributed Uniform Pseudo-Random Number Generator,” ACM Trans. Modeling and Computer Simulation, vol. 8, no. 1, pp. 3-30, 1998.
[11] D.M. Miller, “Spectral and Two-Place Decomposition Techniques in Reversible Logic,” Proc. 45th Midwest Symp. Circuits and Systems (MWSCAS), Aug. 2002.
[12] M. Nielsen and I. Chuang, Quantum Computation and Quantum Information. Cambridge Univ. Press, 2000.
[13] C. Negrevergne et al., “Benchmarking Quantum Control Methods on a 12-Qubit System,” Physical Rev. Letters, vol. 96, no. 17, p. 170501, http://arxiv.org/abs/quant-ph0603248, 2006.
[14] A. Peres, “Reversible Logic and Quantum Computers,” Physical Rev. A, vol. 32, no. 6, pp. 3266-3276, 1985.
[15] M. Perkowski et al., “A General Decomposition for Reversible Logic,” Proc. Fifth Reed-Muller Workshop, pp. 119-138, 2001.
[16] A.K. Prasad et al., “Algorithms and Data Structures for Simplifying Reversible Circuits,” ACM J. Emerging Technologies in Computing Systems, vol. 2, no. 4, pp. 277-293, 2006.
[17] M. Saeedi et al., “On the Behavior of Substitution-Based Reversible Circuit Synthesis Algorithms Investigation and Improvement,” Proc. IEEE Computer Soc. Ann. Symp. VLSI (ISVLSI '07), pp. 428-436, Mar. 2007.
[18] V.V. Shende et al., “Synthesis of Reversible Logic Circuits,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 6, pp. 710-722, http://arxiv.org/abs/quant-ph0207001, June 2003.
[19] P.W. Shor, “Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer,” SIAM J. Computing, vol. 26, pp. 1484-1509, 1997.
[20] G. Yang et al., “Bi-Directional Synthesis of 4-Bit Reversible Circuits,” Computer J., vol. 51, no. 2, pp. 207-215, Mar. 2008.
[21] T. Wang, “Integer Hash Function, Version 3.1,” http://www.concentric.net/~Ttwang/techinthash.htm , Mar. 2007.
[22] IQC Cluster, http://www.iqc.ca/computingcluster.html, Sept. 2010.
35 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool