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Issue No.07 - July (2012 vol.61)
pp: 1026-1039
Hoang Le , University of Southern California, Los Angeles
Viktor K. Prasanna , University of Southern California, Los Angeles
ABSTRACT
Memory efficiency and dynamically updateable data structures for Internet Protocol (IP) lookup have regained much interest in the research community. In this paper, we revisit the classic tree-based approach for solving the longest prefix matching (LPM) problem used in IP lookup. In particular, we target our solutions for a class of large and sparsely distributed routing tables, such as those potentially arising in the next-generation IPv6 routing protocol. Due to longer prefix lengths and much larger address space, preprocessing such routing tables for tree-based LPM can significantly increase the number of prefixes and/or memory stages required for IP lookup. We propose a prefix partitioning algorithm (DPP) to divide a given routing table into k groups of disjoint prefixes (k is given). The algorithm employs dynamic programming to determine the optimal split lengths between the groups to minimize the total memory requirement. Our algorithm demonstrates a substantial reduction in the memory footprint compared with those of the state of the art in both IPv4 and IPv6 cases. Two proposed linear pipelined architectures, which achieve high throughput and support incremental updates, are also presented. The proposed algorithm and architectures achieve a memory efficiency of 1 byte of memory for each byte of prefix for both IPv4 and IPv6. As a result, our design scales well to support either larger routing tables, longer prefix lengths, or both. The total memory requirement depends solely on the number of prefixes. Implementations on 45 nm ASIC and a state-of-the-art FPGA device (for a routing table consisting of 330K prefixes) show that our algorithm achieves 980 and 410 million lookups per second, respectively. These results are well suited for 100 Gbps lookup. The implementations also scale to support larger routing tables and longer prefix length when we go from IPv4 to IPv6. Additionally, the proposed architectures can easily interface with external SRAMs to ease the limitation of on-chip memory of the target devices.
INDEX TERMS
IP Lookup, longest prefix matching, reconfigurable, field-programmable gate array (FPGA), pipeline, partitioning.
CITATION
Hoang Le, Viktor K. Prasanna, "Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning", IEEE Transactions on Computers, vol.61, no. 7, pp. 1026-1039, July 2012, doi:10.1109/TC.2011.130
REFERENCES
[1] 2-3 Tree, http://en.wikipedia.org/wiki2-3_tree, 2011.
[2] F. Baboescu, S. Rajgopal, L. Huang, and N. Richardson, “Hardware Implementation of a Tree Based IP Lookup Algorithm for oc-768 and beyond,” Proc. DesignCon '05, pp. 290-294, 2005.
[3] F. Baboescu, D.M. Tullsen, G. Rosu, and S. Singh, “A Tree Based Router Search Engine Architecture with Single Port Memories,” Proc. Ann. Int'l Symp. Computer Architecture (ISCA '05), pp. 123-133, 2005.
[4] A. Basu and G. Narlikar, “Fast Incremental Updates for Pipelined Forwarding Engines,” Proc. IEEE INFOCOM '03, pp. 64-74, 2003.
[5] M. Behdadfar, H. Saidi, H. Alaei, and B. Samari, “Scalar Prefix search—a New Route Lookup Algorithm for Next Generation Internet,” Proc. IEEE INFOCOM '09, 2009.
[6] BST, http://en.wikipedia.org/wikiBinary_search_tree , 2011.
[7] CACTI Tool, http://quid.hpl.hp.com:9081cacti/, 2011.
[8] H.J. Chao and B. Liu, High Performance Switches and Routers. JohnWiley & Sons, 2007.
[9] CompleteBST, http://xlinux.nist.gov/dads//HTML completeBinaryTree. html , 2011.
[10] Dynamic Programming, http://en.wikipedia.org/wiki Dynamic_programming , 2011.
[11] H. Fadishei, M.S. Zamani, and M. Sabaei, “A Novel Reconfigurable Hardware Architecture for IP Address Lookup,” Proc. ACM Symp. Architecture for Networking and Comm. Systems (ANCS '05), pp. 81-90, 2005.
[12] J. Fu and J. Rexford, “Efficient IP-Address Lookup with a Shared Forwarding Table for Multiple Virtual Routers,” CoNEXT '08: Proc. ACM CoNEXT Conf., pp. 1-12, 2008.
[13] T. Ganegedara, W. Jiang, and V. Prasanna, “Frug: A Benchmark for Packet Forwarding in Future Networks,” IPCCC '10: Proc. IEEE Int'l Performance Computing and Comm. Conf., 2010.
[14] W. Jiang and V.K. Prasanna, “A Memory-Balanced Linear Pipeline Architecture for Trie-Based IP Lookup,” Proc. Ann. IEEE Symp. High-Performance Interconnects (HOTI '07), pp. 83-90, 2007.
[15] A. Kennedy, X. Wang, Z. Liu, and B. Liu, “Low Power Architecture for High Speed Packet Classification,” Proc. ACM/IEEE Symp. Architecture for Networking and Comm. Systems (ANCS), 2008.
[16] S. Kumar, M. Becchi, P. Crowley, and J. Turner, “CAMP: Fast and Efficient IP Lookup Architecture,” Proc. ACM/IEEE Symp. Architecture for Networking and Comm. Systems (ANCS '06), pp. 51-60, 2006.
[17] H. Le, W. Jiang, and V.K. Prasanna, “A SRAM-Based Architecture for Trie-Based IP Lookup Using FPGA,” Proc. Int'l Symp. Field-Programmable Custom Computing Machines (FCCM '08), 2008.
[18] H. Le and V.K. Prasanna, “Scalable High Throughput and Power Efficient IP-Lookup on FPGA,” Proc. IEEE Symp. Field-Programmable Custom Computing Machines (FCCM '09), 2009.
[19] H. Lu and S. Sahni, “A B-Tree Dynamic Router-Table Design,” IEEE Trans. Computers, vol. 54, no. 7, pp. 813-824, July 2005.
[20] D.R. Morrison, “Patricia-Practical Algorithm to Retrieve Information Coded in Alphanumeric,” J. ACM, vol. 15, no. 4, pp. 514-534, 1968.
[21] L. Peng, W. Lu, and L. Duan, “Power Efficient IP Lookup with Supernode Caching,” Proc. IEEE Global Telecomm. Conf. (GLOBECOM '07), pp. 215-219, Nov. 2007.
[22] RIS RAW DATA, http:/data.ris.ripe.net, 2011.
[23] M.A. Ruiz-Sanchez, E.W. Biersack, and W. Dabbous, “Survey and Taxonomy of IP Address Lookup Algorithms,” IEEE Network, vol. 15, no. 2, pp. 8-23, Mar./Apr. 2001.
[24] S. Sahni and K.S. Kim, “An o($\log n$ ) Dynamic Router-table Design,” IEEE Trans. Computers, vol. 53, no. 3, pp. 351-363, Mar. 2004.
[25] SAMSUNG SRAMs, http:/www.samsung.com, 2011.
[26] R. Sangireddy, N. Futamura, S. Aluru, and A.K. Somani, “Scalable, Memory Efficient, High-Speed IP Lookup Algorithms,” IEEE/ACM Trans. Networking, vol. 13, no. 4, pp. 802-812, Aug. 2005.
[27] K. Sklower, “A Tree-Based Packet Routing Table for Berkeley Unix,” Proc. Winter Usenix Conf., pp. 93-99, 1991.
[28] H. Song, F. Hao, M. Kodialam, and T. Lakshman, “IPv6 Lookups Using Distributed and Load Balanced Bloom Filters for 100Gbps Core Router Line Cards,” Proc. IEEE INFOCOM '09, 2009.
[29] H. Song, M. Kodialam, F. Hao, and T.V. Lakshman, “Building Scalable Virtual Routers with Trie Braiding,” Proc. IEEE INFOCOM '10, pp. 1442-1450, 2010.
[30] H. Song, M.S. Kodialam, F. Hao, and T.V. Lakshman, “Scalable IP Lookups Using Shape Graphs,” Proc. Int'l Conf. Network Protocols (ICNP '09), 2009.
[31] I. Sourdis, G. Stefanakis, R. de Smet, and G.N. Gaydadjiev, “Range Tries for Scalable Address Lookup,” Proc. ACM/IEEE Symp. Architecture for Networking and Comm. Systems (ANCS '09), 2009.
[32] V. Srinivasan and G. Varghese, “Fast Address Lookups Using Controlled Prefix Expansion,” ACM Trans. Computer Systems, vol. 17, pp. 1-40, 1999.
[33] M. Wang, S. Deering, T. Hain, and L. Dunn, “Non-Random Generator for IPv6 Tables,” HOTI '04: Proc. Ann. IEEE Symp. High Performance Interconnects, pp. 35-40, 2004.
[34] P. Warkhede, S. Suri, and G. Varghese, “Multiway Range Trees: Scalable IP Lookup with Fast Updates,” Computer Networks: The Int'l J. Computer and Telecomm. Networking , vol. 44, no. 3, pp. 289-303, 2004.
[35] Xilinx, http://www.xilinx.com/support/documentation/ application_notesxapp802.pdf , 2011.
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