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Issue No.09 - September (2011 vol.60)
pp: 1300-1312
Ming Gao , Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
Hsiu-Ming Chang , Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
P. Lisherness , Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
Kwang-Ting Cheng , Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
There is a growing demand for online hardware checking capability to cope with increasing in-field failures resulting from variability and reliability problems. While many online checking schemes have been proposed, their area overhead remains too high for cost-sensitive applications. In this paper, we introduce a Time-Multiplexed Online Checking (TMOC) scheme using embedded field-programmable blocks for checker implementation, which enables various system parts to be checked dynamically in-field in a time-multiplexed fashion. The test quality analyses using a probabilistic model show that TMOC could maintain high fault coverage that is similar to traditional dedicated checkers. We conducted a case study of an H.264 decoder design that demonstrates our TMOC scheme provides a significant reduction in chip area and power overhead for online checkers at the cost of increased fault detection latency. We have successfully implemented and demonstrated our proposed TMOC scheme using a single Field-Programmable Gate Array (FPGA) chip.
Circuit faults, Fault detection, System-on-a-chip, Synchronization, Field programmable gate arrays, Hardware, Transient analysis,fault tolerance., Availability, built-in tests, error-checking
Ming Gao, Hsiu-Ming Chang, P. Lisherness, Kwang-Ting Cheng, "Time-Multiplexed Online Checking", IEEE Transactions on Computers, vol.60, no. 9, pp. 1300-1312, September 2011, doi:10.1109/TC.2011.34
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