This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
A Word-Level Finite Field Multiplier Using Normal Basis
June 2011 (vol. 60 no. 6)
pp. 890-895
ASCII Text
x 
 
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmadi, "A Word-Level Finite Field Multiplier Using Normal Basis," IEEE Transactions on Computers, vol. 60, no. 6, pp. 890-895, June, 2011.
 
 
BibTex
x
 
@article{ 10.1109/TC.2010.235,
author = {Ashkan Hosseinzadeh Namin and Huapeng Wu and Majid Ahmadi},
title = {A Word-Level Finite Field Multiplier Using Normal Basis},
journal ={IEEE Transactions on Computers},
volume = {60},
number = {6},
issn = {0018-9340},
year = {2011},
pages = {890-895},
doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2010.235},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - A Word-Level Finite Field Multiplier Using Normal Basis
IS - 6
SN - 0018-9340
SP890
EP895
EPD - 890-895
A1 - Ashkan Hosseinzadeh Namin,
A1 - Huapeng Wu,
A1 - Majid Ahmadi,
PY - 2011
KW - Finite field multiplier
KW - normal basis
KW - optimal normal basis
KW - elliptic curve cryptography.
VL - 60
JA - IEEE Transactions on Computers
ER -
 
Ashkan Hosseinzadeh Namin, University of Waterloo, Waterloo
Huapeng Wu, University of Windsor, Windsor
Majid Ahmadi, University of Windsor, Windsor
Hardware implementations of finite field arithmetic using normal basis are advantageous due to the fact that the squaring operation can be done at almost no cost. In this paper, a new word-level finite field multiplier using normal basis is proposed. The proposed architecture takes d clock cycles to compute the product bits, where the value for d, 1\leq d \leq m, can be arbitrarily selected by the designer to set the tradeoff between area and speed. When there exists an optimal normal basis, it is shown that the proposed design has a smaller critical path delay than other word-level normal basis multipliers found in the literature, while its circuit complexities are moderate and comparable to the others. Different word size multipliers were implemented in hardware, and implementation results are also presented.

[1] R. Lidl and H. Niederreiter, Introduction to Finite Fields and Their Applications, second ed., Cambridge Univ. Press, 1997.
[2] D. Hankerson, A. Menezes, and S. Vanstone, Guide to Elliptic Curve Cryptography. Springer, Dec. 2003.
[3] C.C. Wang, T.K. Truong, H.M. Shao, L.J. Deutsch, J.K. Omura, and I.S. Reed, "VLSI Architectures for Computing Multiplications and Inverses in GF $(2^m)$ ," IEEE Trans. Computers, vol. 34, no. 8, pp. 709-717, Aug. 1985.
[4] G.B. Agnew, R.C. Mullin, I.M. Onyszchuck, and S.A Vanstone, "An Implementation for a Fast Public-Key Cryptosystem," J. Cryptology, vol. 3, pp. 63-79, 1991.
[5] T. Beth and Gollman, "Algorithm Engineering for Public Key Algorithms," IEEE J. Selected Areas in Comm., vol. 7, no. 4, pp. 458-465, May 1989.
[6] M. Feng, "A VLSI Architecture for Fast Inversion in $GF(2^m)$ ," IEEE Trans. Computers, vol. 38, no. 10, pp. 1383-1386, Oct. 1989.
[7] W. Geiselmann and D. Gollmann, "Symmetry and Duality in Normal Basis Multiplication," Proc. Applied Algebra, Algebraic Algorithms, and Error Correcting Codes Symp., pp. 230-238, July 1998.
[8] L. Gao and G.E. Sobelman, "Improved VLSI Designs for Multiplication and Inversion in $GF(2^M)$ over Normal Bases," Proc. 13th Ann. IEEE Int'l ASIC/SOC Conf., pp. 97-101, 2000.
[9] C.C. Wang, T.K. Truong, H.M. Shao, L.J. Deutsch, J.K. Omura, and I.S. Reed, "VLSI Architectures for Computing Multiplications and Inverses in $GF(2^m)$ ," IEEE Trans. Computers, vol. 34, no. 8, pp. 709-716, Aug. 1985.
[10] A. Reyhani-Masoleh and M.A. Hasan, "A New Construction of Massey-Omura Parallel Multiplier over $GF(2^m)$ ," IEEE Trans. Computers, vol. 51, no. 5, pp. 511-520, May 2002.
[11] M.A. Hasan, M.z. Wang, and V.K. Bhargava, "A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields," IEEE Trans. Computers, vol. 42, no. 10, pp. 1278-1280, Oct. 1993.
[12] H. Wu and M.A. Hasan, "Low Complexity Bit-Parallel Multipliers for a Class of Finite Fields," IEEE Trans. Computers, vol. 47, no. 8, pp. 883-887, Aug. 1998.
[13] H. Wu, M. Anwarl Hasan, I.F. Blake, S. Gao, "Finite Field Multiplier Using Redundant Representation," IEEE Trans. Computers, vol. 51, no. 11, pp. 1306-1316, Nov. 2002.
[14] M.A. Hasan and V.K. Bhargava, "Low Complexity Architecture for Exponentiation in GF $(2^m)$ ," IEEE Electronics Letters, vol. 28, no. 21, pp. 1984-1986, Oct. 1992.
[15] J.L. Massey and J.K. Omura, "Computational Method and Apparatus for Finite Field Arithmetic," US Patent Application, 1984.
[16] C.K. Koc and B. Sunar, "Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields," IEEE Trans. Computers, vol. 47, no. 3, pp. 353-356, Mar. 1998.
[17] A. Reyhani-Masoleh and M.A. Hasan, "Low Complexity Word-Level Sequential Normal Basis Multipliers," IEEE Trans. Computers, vol. 54, no. 2, pp. 98-110, Feb. 2005.
[18] A. Reyhani-Masoleh and M.A. Hasan, "Efficient Digit-Serial Normal Basis Multipliers over GF $(2^m)$ ," ACM Trans. Embedded Computing Systems, vol. 3, no. 3, pp. 428-439, Aug. 2004.
[19] R.C. Mullin and R.M. Wilson, "Optimal Normal Bases In GF($p^n$ )," Discrete Applied Math., vol. 22, pp. 149-161, 1989.
[20] L. Gao and G.E. Sobelman, "Improved VLSI Design for Multiplication and Inversion in GF $(2^m)$ over Normal Basis," Proc. 13th Ann. IEEE ASIC/SOC Conf., pp. 97-101, Sept. 2000.
[21] "Chapter 2, Stratix Architecture," Stratix Device Handbook. Altera Corporation, version 3.3, July 2005.

Index Terms:
Finite field multiplier, normal basis, optimal normal basis, elliptic curve cryptography.
Citation:
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmadi, "A Word-Level Finite Field Multiplier Using Normal Basis," IEEE Transactions on Computers, vol. 60, no. 6, pp. 890-895, June 2011, doi:10.1109/TC.2010.235
Usage of this product signifies your acceptance of the Terms of Use.