The Community for Technology Leaders
RSS Icon
Issue No.03 - March (2011 vol.60)
pp: 360-374
Ziliang Zong , South Dakota School of Mines & Technology, Rapid City
Adam Manzanares , Auburn University, Auburn
Xiaojun Ruan , Auburn University, Auburn
Xiao Qin , Auburn University, Auburn
High-performance clusters have been widely deployed to solve challenging and rigorous scientific and engineering tasks. On one hand, high performance is certainly an important consideration in designing clusters to run parallel applications. On the other hand, the ever increasing energy cost requires us to effectively conserve energy in clusters. To achieve the goal of optimizing both performance and energy efficiency in clusters, in this paper, we propose two energy-efficient duplication-based scheduling algorithms—Energy-Aware Duplication (EAD) scheduling and Performance-Energy Balanced Duplication (PEBD) scheduling. Existing duplication-based scheduling algorithms replicate all possible tasks to shorten schedule length without reducing energy consumption caused by duplication. Our algorithms, in contrast, strive to balance schedule lengths and energy savings by judiciously replicating predecessors of a task if the duplication can aid in performance without degrading energy efficiency. To illustrate the effectiveness of EAD and PEBD, we compare them with a nonduplication algorithm, a traditional duplication-based algorithm, and the dynamic voltage scaling (DVS) algorithm. Extensive experimental results using both synthetic benchmarks and real-world applications demonstrate that our algorithms can effectively save energy with marginal performance degradation.
Homogeneous clusters, energy-aware scheduling, duplication algorithms.
Ziliang Zong, Adam Manzanares, Xiaojun Ruan, Xiao Qin, "EAD and PEBD: Two Energy-Aware Duplication Scheduling Algorithms for Parallel Tasks on Homogeneous Clusters", IEEE Transactions on Computers, vol.60, no. 3, pp. 360-374, March 2011, doi:10.1109/TC.2010.216
[1] "Electrical Energy," The New Book of Popular Science. Grolier Inc., 2000.
[2] downloadsEPA_Datacenter_Report_Congress_Final1.pdf , 2010.
[3] S. Darbha and D.P. Agrawal, "Optimal Scheduling Algorithm for Distributed-Memory Machines," IEEE Trans. Parallel and Distributed Systems, vol. 9, no. 1, pp. 87-95, Jan. 1998.
[4] S. Ranaweera and D.P. Agrawal, "A Task Duplication Based Scheduling Algorithm for Heterogeneous Systems," Proc. Parallel and Distributed Processing Symp., pp. 445-450, May 2000.
[5] S. Bansal, P. Kumar, and K. Singh, "An Improved Duplication Strategy for Scheduling Precedence Constrained Graphs in Multiprocessor Systems," IEEE Trans. Parallel and Distributed Systems, vol. 14, no. 6, pp. 533-544, June 2003.
[6] M. Warren, E. Weigle, and W. Feng, "High-Density Computing: A 240-Node Beowulf in One Cubic Meter," Proc. ACM/IEEE Supercoputing (SC '02), Nov. 2002.
[7] A. Gara, M.A. Blumrich, D. Chen, G.L.-T. Chiu, P. Coteus, M.E. Giampapa, R.A. Haring, P. Heidelberger, D. Hoenicke, G.V. Kopcsay, T.A. Liebsch, M. Ohmacht, B.D. Steinmacher-Burow, T. Takken, and P. Vranas, "Overview of the Blue Gene/L System Architecture," IBM J. Research and Development, vol. 49, pp. 195-212, , 2005.
[8] "Enhanced Intel SpeedStep Technology for the Intel Pentium M Processor," Intel white paper, papers30117401.pdf, 2010.
[9] "Cool'n'Quiet Technology Installation Guide for AMD Athlon 64 Processor Based Systems," DownloadableAssetsCool_N_Quiet_Installation_ Guide3.pdf , 2010.
[10] W. Dally, P. Carvey, and L. Dennison, "The Avici Terabit Switch/Rounter," Proc. IEEE Hot Interconnects 6, pp. 41-50, Aug. 1998.
[11] E.N.M. Elnozahy, M. Kistler, and R. Rajamony, "Energy-Efficient Server Clusters," Proc. Int'l Workshop Power-Aware Computer Systems, Feb. 2002.
[12] Mellanox Technologies Inc.,"Mellanox Performance, Price, Power, Volume Metric (PPPV)," , 2004.
[13] C. Gunaratne, K. Christensen, and B. Nordman, "Managing Energy Consumption Costs in Desktop PCs and LAN Switches with Proxying, Split TCP Connections, and Scaling of Link Speed," Int'l J. Network Management, vol. 15, no. 5, pp. 297-310, Sept./Oct. 2005.
[14] G.C. Sih and E.A. Lee, "A Compile Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processors Architectures," IEEE Trans. Parallel and Distributed Systems, vol. 4, no. 2, pp. 175-187, Feb. 1993.
[15] S.S. Pande, D.P. Agrawal, and J. Mauney, "A Scalable Scheduling Method for Functional Parallelism on Distributed Memory Multiprocessors," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 4, pp. 388-399, Apr. 1995.
[16] L. Benini and G. De Micheli, Dynamic Power Management: Design Techniques and CAD Tools. Kluwer Academic Publishers, 1998.
[17] A.R. Chandrakasan and R.W. Brodersen, Low Power Digital CMOS Design. Kluwer Academic Publishers, 1995.
[18] Lower Power Design Methodologies, J. Rabaey and M. Pedram, eds., Kluwer Academic Publishers, 1998.
[19] A. Raghunathan, N.K. Jha, and S. Dey, High-Level Power Analysis and Optimization. Kluwer Academic Publishers, 1998.
[20] L. Benini, A. Bogliolo, and G.D. Micheli, "A Survey of Design Techniques for System-Level Dynamic Power Management," IEEE Trans. Very Large Scale Integration Systems, vol. 8, no. 3, pp. 299-316, June 2000.
[21] M. Srivastava, A. Chandrakasan, and R. Brodersen, "Predictive System Shutdown and Other Architectural Techniques for Energy Efficient Programmable Computation," IEEE Trans. Very Large Scale Integration Systems, vol. 4, no. 1, pp. 42-55, Mar. 1996.
[22] K. Flautner, S.K. Reinhardt, and T.N. Mudge, "Automatic Performance Setting for Dynamic Voltage Scaling," Proc. Seventh Conf. Mobile Computing and Networking, pp. 260-271, 2001.
[23] D. Grunwald, P. Levis, K.I. Farkas, C.B. MorreyIII, and M. Neufeld, "Policies for Dynamic Clock Scheduling," Proc. Fourth Symp. Operating Systems Design and Implementation (OSDI), pp. 73-86, 2000.
[24] J.R. Lorch and A.J. Smith, "Improving Dynamic Voltage Scaling Algorithms with PACE," ACM SIGMETRICS Performance Evaluation Rev., vol. 29, pp. 50-61, 2001.
[25] T.L. Martin, "Balancing Batteries, Power, and Performance: System Issues in CPU Speed-Setting for Mobile Computing," PhD thesis, Carnegie Mellon Univ., 2001.
[26] A. Miyoshi, C. Lefurgy, E.C. Hensbergen, R. Rajamony, and R. Rajkumar, "Critical Power Slope: Understanding the Runtime Effects of Frequency Scaling," Proc. 16th Int'l Conf. Supercomputing, pp. 35-44, 2002.
[27] N. Kappiah, D.K. Lowenthal, and V.W. Freeh, "Just In Time Dynamic Voltage Scaling: Exploiting Inter-Node Slack to Save Energy in MPI Programs," Proc. ACM/IEEE Supercomputing Conf. (SC '05), 2006.
[28] M. Annavaram, E. Grochowski, and J. Shen, "Mitigating Amdahl's Law through EPI throttling," Proc. 32nd Ann. Int'l Symp. Computer Architecture (ISCA '05), pp. 298-309, June 2005.
[29] R. Bianchini and R. Rajamony, "Power and Energy Management for Server Systems," Computer, vol. 37, no. 11, pp. 68-76, Nov. 2004.
[30] M.Y. Lim, V.W. Freeh, and D.K. Lowenthal, "Adaptive, Transparent Frequency and Voltage Scaling of Communication Phases in MPI Programs," Proc. ACM/IEEE Supercomputing (SC '06), 2006.
[31] R. Springer, D.K. Lowenthal, B. Rountree, and V.W. Freeh, "Minimizing Execution Time in MPI Programs on an Energy-Constrained, Power-Scalable Cluster," Proc. 11th ACM SIGPLAN Symp. Principles and Practice of Parallel Programming (PPoPP '06), pp. 230-238, 2006.
[32] C.-H. Hsu and W.-C. Feng, "A Power-Aware Run-Time System for High-Performance Computing," Proc. ACM/IEEE Supercomputing (SC '05), 2005.
[33] Y. Hotta, M. Sato, H. Kimura, S. Matsuoka, T. Boku, and D. Takahashi, "Profile-Based Optimization of Power Performance by Using Dynamic Voltage Scaling on a PC Cluster," Proc. 20th IEEE Int'l Parallel and Distributed Processing Symp. (IPDPS '06), 2006.
[34] C.-H. Hsu and W.-C. Feng, "A Feasibility Analysis of Power Awareness in Commodity-Based High-Performance Clusters," Proc. IEEE Int'l Conf. Cluster Computing (Cluster '05), 2005.
[35] L. Shang, L. Peh, and N.K. Jha, "Power-Efficient Interconnection Networks: Dynamic Voltage Scaling with Links," Computer Architecture Letters, vol. 1, no. 1, p. 6, Jan. 2002.
[36] L. Shang et al., "Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks," Proc. Ninth Int'l Symp. High-Performance Computer Architecture (HPCA-9), pp. 79-90, Feb. 2003.
[37] V. Soteriou and L.-S. Peh, "Dynamic Power Management for Power Optimization of Interconnection Networks Using On/Off Links," Proc. 11th Symp. High Performance Interconnects (Hot Interconnects), Aug. 2003.
[38] C. Gunaratne, K. Christensen, B. Nordman, and S. Suen, "Reducing the Energy Consumption of Ethernet with Adaptive Link Rate (ALR)," IEEE Trans. Computers, vol.57, no. 4, pp. 448-461, Apr. 2008.
[39] R. Zamani, A. Afsahi, Y. Qian, and C. Hamacher, "A Feasibility Analysis of Power-Awareness and Energy Minimization in Modern Interconnects for High-Performance Computing," Proc. Ninth IEEE Int'l Conf. Cluster Computing (Cluster '07), Sept. 2007.
[40] Y.-K. Kwok and I. Ahmad, "Efficient Scheduling of Arbitrary Task Graphs to Multiprocessors Using a Parallel Genetic Algorithm," J. Parallel and Distributed Computing, vol. 47, no.1, pp. 58-77, 1997.
[41] R.L. Graham, L.E. Lawler, J.K. Lenstra, and A.H. Kan, "Optimizing and Approximation in Deterministic Sequencing and Scheduling: A Survey," Annals of Discrete Math, vol. 5, pp. 287-326, 1979.
[42] M.Y. Wu and D.D. Gajski, "Hypertool: A Performance Aid for Message-Passing Systems," IEEE Trans. Parallel and Distributed Systems, vol. 1, no. 3, pp. 330-343, July 1990.
[43] R. Ge, X.Z. Feng, and K.W. Cameron, "Performance-Constrained Distributed DVS Scheduling for Scientific Applications on Power-Aware Clusters," Proc. ACM/IEEE Supercomputing Conf. (SC '05), p. 34, Nov. 2005.
[44] amd-energy- efficient_6.html, 2010.
[45] pentiumm.htm, 2010.
[46], 2010.
[47] , 2010.
[48] resources/doc_ library/data_sheetspro1000mt_sa_dual.pdf , 2010.
[49] InfiniScaleIII.pdf , 2010.
[50] ConnectX_ IB_Card.pdf, 2010.
[51] M3-4SW32- 16Q/, 2010.
[52] , 2010.
[53] DisplayPages3A912204F260613680256DD9005122C7 , 2008.
[54] DisplayPages3A912204F260613680256DD9005122C7 , 2008.
[55] Standard Task Graph Set web site, http:/www.kasahara.elec., 2010.
24 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool