Subscribe
Issue No.02  February (2011 vol.60)
pp: 202213
Mark G. Arnold , Lehigh University, Bethlehem
Sylvain Collange , ELIAUS, Université de Perpignan, Perpignan
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.154
ABSTRACT
The real Logarithmic Number System (LNS) offers fast multiplication but uses more expensive addition. Cotransformation and higher order table methods allow real LNS ALUs with reasonable precision on FieldProgrammable Gate Arrays (FPGAs). The Complex LNS (CLNS) is a generalization of LNS, which represents complex values in logpolar form. CLNS is a more compact representation than traditional rectangular methods, reducing bus and memory cost in the FFT; however, prior CLNS implementations were either slow CORDICbased or expensive 2Dtablebased approaches. Instead, we reuse real LNS hardware for CLNS, with specialized hardware (including a novel \log \sin that overcomes singularity problems) that is smaller than the realvalued LNS ALU to which it is attached. All units were derived from the FloatingPointCores (FloPoCo) library. FPGA synthesis shows our CLNS ALU is smaller than prior fast CLNS units. We also compare the accuracy of prior and proposed CLNS implementations. The most accurate of the proposed methods increases the error in radixtwo FFTs by less than half a bit, and a more economical FloPoCobased implementation increases the error by only one bit.
INDEX TERMS
Complex arithmetic, logarithmic number system, hardware function evaluation, FPGA, fast Fourier transform, VHDL.
CITATION
Mark G. Arnold, Sylvain Collange, "A Real/Complex Logarithmic Number System ALU", IEEE Transactions on Computers, vol.60, no. 2, pp. 202213, February 2011, doi:10.1109/TC.2010.154
REFERENCES
