Conditional Partial Order Graphs: Model, Synthesis, and Application

Andrey Mokhov; Alexandre (Alex) Yakovlev

doi:10.1109/TC.2010.58

Publication
2010
Issue No. 11 - November
Abstract - Conditional Partial Order Graphs: Model, Synthesis, and Application

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Conditional Partial Order Graphs: Model, Synthesis, and Application

November 2010 (vol. 59 no. 11)

pp. 1480-1493

	ASCII Text	x
	Andrey Mokhov, Alexandre (Alex) Yakovlev, "Conditional Partial Order Graphs: Model, Synthesis, and Application," IEEE Transactions on Computers, vol. 59, no. 11, pp. 1480-1493, November, 2010.

	BibTex	x
	@article{ 10.1109/TC.2010.58, author = {Andrey Mokhov and Alexandre (Alex) Yakovlev and Wei Dong and Chun Chen and Xue Liu and Yunhao Liu and Jiajun Bu and Kougen Zheng}, title = {Conditional Partial Order Graphs: Model, Synthesis, and Application}, journal ={IEEE Transactions on Computers}, volume = {59}, number = {11}, issn = {0018-9340}, year = {2010}, pages = {1480-1493}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2010.58}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - JOUR JO - IEEE Transactions on Computers TI - Conditional Partial Order Graphs: Model, Synthesis, and Application IS - 11 SN - 0018-9340 SP1480 EP1493 EPD - 1480-1493 A1 - Andrey Mokhov, A1 - Alexandre (Alex) Yakovlev, PY - 2010 KW - Logic synthesis KW - concurrency KW - partial orders KW - asynchronous circuits KW - microarchitecture. VL - 59 JA - IEEE Transactions on Computers ER -

Andrey Mokhov, Newcastle University, Newcastle upon Tyne

Alexandre (Alex) Yakovlev, Newcastle University, Newcastle Upon Tyne

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.58

The paper introduces a new formal model for specification and synthesis of control paths in the context of asynchronous system design. The model, called Conditional Partial Order Graph (CPOG), captures concurrency and choice in a system's behavior in a compact and efficient way. It has advantages over widely used interpreted Petri Nets and Finite State Machines for a class of systems which have many behavioral scenarios defined on the same set of actions, e.g., CPU microcontrollers. The CPOG model has potential applications in the area of microcontrol synthesis and brings new methods for modeling concurrency into the application domain of modern and future processor architectures. The paper gives the formal definition of the CPOG model, formulates and solves the problem of CPOG synthesis, and introduces various optimization techniques. The presented ideas can be applied for CPU control synthesis as well as for synthesis of different kinds of event-coordination circuits often used in data coding and communication in digital systems, as demonstrated with several application examples.

[1] International Technology Roadmap for Semiconductors (ITRS '07). http://www.itrs.net/Links/2007ITRSHome2007.htm , 2007.
[2] A. Bardsley and D. Edwards, "The Balsa Asynchronous Circuit Synthesis System," Proc. Forum on Design Languages, 2000.
[3] J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers," IEICE Trans. Information and Systems, vol. E80-D, no. 3, pp. 315-325, 1997.
[4] J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Logic Synthesis of Asynchronous Controllers and Interfaces," Advanced Microelectronics, Springer-Verlag, 2002.
[5] A. Lew, Computer Science: A Math. Introduction. Prentice-Hall, 1985.
[6] G. De Micheli, Synthesis and Optimization of Digital Circuits. McGraw-Hill Higher Education, 1994.
[7] A. Mokhov, C. D'Alessandro, and A. Yakovlev, "Multiple rail phase encoding circuits," Technical Report, NCL-EECE-MSD-TR-2008-133, May 2008.
[8] A. Mokhov, "Conditional Partial Order Graphs," PhD thesis, Newcastle Univ., Sept. 2009.
[9] A. Mokhov and A. Yakovlev, "Conditional Partial Order Graphs and Dynamically Reconfigurable Control Synthesis," Proc. Design, Automation and Test in Europe (DATE) Conf., 2008.
[10] D. Muller and W. Bartky, "A Theory of Asynchronous Circuits," Proc. Int'l Symp. Theory of Switching, pp. 204-243, 1959.
[11] S. Nowick, "Automatic Synthesis of Burst-Mode Asynchronous Controllers," PhD thesis, Stanford Univ., 1993.
[12] I. Poliakov, A. Mokhov, A. Rafiev, D. Sokolov, and A. Yakovlev, "Automated Verification of Asynchronous Circuits Using Circuit Petri Nets," Proc. Int'l Symp. Advanced Research in Asynchronous Circuits and Systems (ASYNC), 2008.
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[16] K. van Berkel, M. Josephs, and S. Nowick, "Scanning the Technology: Applications of Asynchronous Circuits," Proc. IEEE, 1999.
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[18] T. Verhoeff, "Delay Insensitive Codes—An Overview," Distributed Computing, vol. 3, no. 1, pp. 1-8, 1988.
[19] I. Wegener, The Complexity of Boolean Functions. Johann Wolfgang Goethe-Universitat, 1987.
[20] A. Yakovlev, M. Kishinevsky, A. Kondratyev, L. Lavagno, and M. Pietkiewicz-Koutny, "On the Models for Asynchronous Circuit Behaviour with OR Causality," Formal Methods in System Design, vol. 9, pp. 189-234, 1996.
[21] K.Y. Yun, D.L. Dill, and S.M. Nowick, "Synthesis of 3D Asynchronous State Machines," Proc. Int'l Conf. Computer Design (ICCD), pp. 346-350, 1992.

Index Terms:

Logic synthesis, concurrency, partial orders, asynchronous circuits, microarchitecture.

Citation:

Andrey Mokhov, Alexandre (Alex) Yakovlev, Wei Dong, Chun Chen, Xue Liu, Yunhao Liu, Jiajun Bu, Kougen Zheng, "Conditional Partial Order Graphs: Model, Synthesis, and Application," IEEE Transactions on Computers, vol. 59, no. 11, pp. 1480-1493, Nov. 2010, doi:10.1109/TC.2010.58

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SenSpire OS: A Predictable, Flexible, and Efficient Operating System for Wireless Sensor Networks

November 2010 (vol. 59 no. 11)

pp. 1480-1493

	ASCII Text	x
	Wei Dong, Chun Chen, Xue Liu, Yunhao Liu, Jiajun Bu, Kougen Zheng, "Conditional Partial Order Graphs: Model, Synthesis, and Application," IEEE Transactions on Computers, vol. 59, no. 11, pp. 1480-1493, November, 2010.

	BibTex	x
	@article{ 10.1109/TC.2010.58, author = {Andrey Mokhov and Alexandre (Alex) Yakovlev and Wei Dong and Chun Chen and Xue Liu and Yunhao Liu and Jiajun Bu and Kougen Zheng}, title = {Conditional Partial Order Graphs: Model, Synthesis, and Application}, journal ={IEEE Transactions on Computers}, volume = {59}, number = {11}, issn = {0018-9340}, year = {2010}, pages = {1480-1493}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2010.58}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - JOUR JO - IEEE Transactions on Computers TI - SenSpire OS: A Predictable, Flexible, and Efficient Operating System for Wireless Sensor Networks IS - 11 SN - 0018-9340 SP1480 EP1493 EPD - 1480-1493 A1 - Wei Dong, A1 - Chun Chen, A1 - Xue Liu, A1 - Yunhao Liu, A1 - Jiajun Bu, A1 - Kougen Zheng, PY - 2010 KW - Wireless sensor networks KW - operating systems. VL - 59 JA - IEEE Transactions on Computers ER -

Wei Dong, Zhejiang University, Hangzhou

Chun Chen, Zhejiang University, Hangzhou

Xue Liu, University of Nebraska Lincoln

Yunhao Liu, Tsinghua University

Jiajun Bu, Zhejiang University, Hangzhou

Kougen Zheng, Zhejiang University, Hangzhou

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.58

The development of a modern sensor network is difficult because of the long-term unattended operation mode, diverse application requirements, and stringent resource constraints. To address these issues, we present SenSpire OS, a predictable, flexible, and efficient operating system for wireless sensor networks. We improve system predictability by two-phase interrupt servicing and predictable thread synchronization; we achieve system flexibility by providing a hybrid model for both event-driven programming and multithreaded programming; we retain system efficiency by employing stack sharing and modular design. Moreover, we have designed a three-layer networking stack and an object-oriented programming language (CSpire) to enhance system usability and programming convenience. Having implemented SenSpire OS on three most commonly used sensor node platforms, we evaluate its performance extensively. Results show that SenSpire OS ensures predictable system performance, provides a flexible hybrid model for application programming, and is efficient in resource utilization.

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Index Terms:

Wireless sensor networks, operating systems.

Citation:

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