Issue No.07 - July (2010 vol.59)
Mirko Loghi , Politecnico di Torino, Torino
Olga Golubeva , Politecnico di Torino, Torino
Enrico Macii , Politecnico di Torino, Torino
Massimo Poncino , Politecnico di Torino, Torino
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.43
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be even pushed further by properly matching the partition to the memory access patterns. When leakage energy comes into play, however, idle memory blocks must be put into a proper low-leakage sleep state to actually save energy when not accessed. In this case, the matching becomes an instance of the power management problem, because moving to and from this sleep state requires additional energy. In this work, we propose an effective solution to the problem of the leakage-aware partitioning of a memory into disjoint subblocks; in particular, we target scratchpad memories, which are commonly used in some embedded systems as a replacement for caches. We show that, although the solution space is extremely large (for a N--block partition, all the combinations of N-1 address boundaries) and nonconvex, it is possible to prove a nontrivial property that considerably reduces the number of partition boundaries to be enumerated, therefore, making exhaustive exploration feasible. We are thus able to provide an optimal solution to the leakage-aware partitioning problem. Experiments on a different sets of embedded applications have shown that total energy savings larger than 60 percent on average can be obtained, with a marginal overhead in execution time, thanks to an effective implementation of the low-leakage sleep state.
Power optimization, leakage power, embedded design, memory hierarchy, scratchpad memory, partitioning algorithm.
Mirko Loghi, Olga Golubeva, Enrico Macii, Massimo Poncino, "Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking", IEEE Transactions on Computers, vol.59, no. 7, pp. 891-904, July 2010, doi:10.1109/TC.2010.43