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An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization
December 2009 (vol. 58 no. 12)
pp. 1654-1667
Jung Sub Kim, Pennsylvania State University, University Park
Lanping Deng, Arizona State University, Tempe
Prasanth Mangalagiri, Pennsylvania State University, University Park
Kevin Irick, Pennsylvania State University, University Park
Kanwaldeep Sobti, Arizona State University. Tempe
Mahmut Kandemir, Pennsylvania State University, University Park
Vijaykrishnan Narayanan, Pennsylvania State University, University Park
Chaitali Chakrabarti, Arizona State University, Tempe
Nikos Pitsianis, Duke University, Durham
Xiaobai Sun, Duke University, Durham
This paper describes TANOR, an automated framework for designing hardware accelerators for numerical computation on reconfigurable platforms. Applications utilizing numerical algorithms on large-size data sets require high-throughput computation platforms. The focus is on N-body interaction problems which have a wide range of applications spanning from astrophysics to molecular dynamics. The TANOR design flow starts with a MATLAB description of a particular interaction function, its parameters, and certain architectural constraints specified through a graphical user interface. Subsequently, TANOR automatically generates a configuration bitstream for a target FPGA along with associated drivers and control software necessary to direct the application from a host PC. Architectural exploration is facilitated through support for fully custom fixed-point and floating-point representations in addition to standard number representations such as single-precision floating point. Moreover, TANOR enables joint exploration of algorithmic and architectural variations in realizing efficient hardware accelerators. TANOR's capabilities have been demonstrated for three different N-body interaction applications: the calculation of gravitational potential in astrophysics, the diffusion or convolution with Gaussian kernel common in image processing applications, and the force calculation with vector-valued kernel function in molecular dynamics simulation. Experimental results show that TANOR-generated hardware accelerators achieve lower resource utilization without compromising numerical accuracy, in comparison to other existing custom accelerators.

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Index Terms:
Algorithms implemented in hardware, reconfigurable hardware, signal processing systems, numerical algorithms.
Jung Sub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin Irick, Kanwaldeep Sobti, Mahmut Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, "An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization," IEEE Transactions on Computers, vol. 58, no. 12, pp. 1654-1667, Dec. 2009, doi:10.1109/TC.2009.78
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