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Siavash BayatSarmadi, M. Anwar Hasan, "Concurrent Error Detection in FiniteField Arithmetic Operations Using Pipelined and Systolic Architectures," IEEE Transactions on Computers, vol. 58, no. 11, pp. 15531567, November, 2009.  
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@article{ 10.1109/TC.2009.62, author = {Siavash BayatSarmadi and M. Anwar Hasan}, title = {Concurrent Error Detection in FiniteField Arithmetic Operations Using Pipelined and Systolic Architectures}, journal ={IEEE Transactions on Computers}, volume = {58}, number = {11}, issn = {00189340}, year = {2009}, pages = {15531567}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2009.62}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Concurrent Error Detection in FiniteField Arithmetic Operations Using Pipelined and Systolic Architectures IS  11 SN  00189340 SP1553 EP1567 EPD  15531567 A1  Siavash BayatSarmadi, A1  M. Anwar Hasan, PY  2009 KW  Finitefield operations KW  concurrent error detection (CED) KW  concurrent error correction (CEC) KW  polynomial basis KW  dual basis KW  normal basis KW  pipelined architectures KW  systolic arrays. VL  58 JA  IEEE Transactions on Computers ER   
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