Issue No.06 - June (2009 vol.58)
Fatih Kocan , Southern Methodist University, Dallas
Lun Li , Southern Methodist University, Dallas
Daniel G. Saab , Case Western Reserve University, Cleveland
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2008.205
Exact path delay fault (PDF) coverage calculation of large circuits with an exponential number of detectable PDFs requires exponential memory space. This often yields memory overflow in computations. One common approach to avoid memory overflow is to partition or virtually cut circuits into several subcircuits and to perform coverage calculation at the partition-level circuit. Partitioning reduces the number of PDFs to be stored in memory exponentially at the expense of losing considerable coverage. This paper describes an algorithm to improve the reported coverage value by recovering the lost PDFs up to a user-controlled degree (\Delta), which is a function of the length of cut net sequences. The reported coverage monotonically increases as \Delta increases: the exact coverage value is guaranteed when \Delta is equal to the number of consecutive partitions on the longest path. Experimental results are provided for the ISCAS85 circuits that illustrate the trade-off between the computation time, the number of partitions, the values of \Delta, and the reported coverage. The results indicate that as \Delta and the number of partitions increase, the runtime does not increase after some point since the cost of set operations reduces as more partitions are created.
Path delay fault, partitioned circuits, nonenumerative, exact coverage, ZBDD, graph theory.
Fatih Kocan, Lun Li, Daniel G. Saab, "Exact Path Delay Fault Coverage Calculation of Partitioned Circuits", IEEE Transactions on Computers, vol.58, no. 6, pp. 858-864, June 2009, doi:10.1109/TC.2008.205