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| Che Wun Chiou, Chin-Cheng Chang, Chiou-Yng Lee, Ting-Wei Hou, Jim-Min Lin, "Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)," IEEE Transactions on Computers, vol. 58, no. 6, pp. 851-857, June, 2009. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.2008.226, author = {Che Wun Chiou and Chin-Cheng Chang and Chiou-Yng Lee and Ting-Wei Hou and Jim-Min Lin}, title = {Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)}, journal ={IEEE Transactions on Computers}, volume = {58}, number = {6}, issn = {0018-9340}, year = {2009}, pages = {851-857}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2008.226}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m) IS - 6 SN - 0018-9340 SP851 EP857 EPD - 851-857 A1 - Che Wun Chiou, A1 - Chin-Cheng Chang, A1 - Chiou-Yng Lee, A1 - Ting-Wei Hou, A1 - Jim-Min Lin, PY - 2009 KW - Finite field multiplication KW - Gaussian normal basis KW - elliptic curve cryptosystem KW - fault-based cryptanalysis KW - concurrent error detection KW - concurrent error correction. VL - 58 JA - IEEE Transactions on Computers ER - | |||
[1] F.J. MacWilliams and N.J.A. Sloane, The Theory of Error-Correcting Codes. North Holland, 1977.
[2] R. Lidl and H. Niederreiter, Introduction to Finite Fields and Their Applications. Cambridge Univ. Press, 1994.
[3] R.E. Blahut, Fast Algorithms for Digital Signal Processing. Addison-Wesley, 1985.
[4] T.C. Bartee and D.J. Schneider, “Computation with Finite Fields,” Information and Computing, vol. 6, pp.79-98, Mar. 1963.
[5] E.D. Mastrovito, “VLSI Architectures for Multiplication over Finite Field ${\rm GF}(2^{\rm m})$ ,” Proc. Sixth Int'l Conf. Applied Algebra, Algebraic Algorithms, and Error-Correcting Codes. (AAECC-6), T. Mora, ed., pp.297-309, July 1988.
[6] Ç.K. Koç and B. Sunar, “Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields,” IEEE Trans. Computers, vol. 47, no. 3, pp.353-356, Mar. 1998.
[7] T. Itoh and S. Tsujii, “Structure of Parallel Multipliers for a Class of Fields ${\rm GF}(2^{\rm m})$ ,” Information and Computation, vol. 83, pp.21-40, 1989.
[8] C.Y. Lee, E.H. Lu, and J.Y. Lee, “Bit-Parallel Systolic Multipliers for ${\rm GF}(2^{\rm m})$ Fields Defined by All-One and Equally-Spaced Polynomials,” IEEE Trans. Computers, vol. 50, no. 5, pp.385-393, May 2001.
[9] C. Paar, “A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields,” IEEE Trans. Computers, vol. 45, no. 7, pp.856-861, July 1996.
[10] H. Wu, “Bit-Parallel Finite Field Multiplier and Squarer Using Polynomial Basis,” IEEE Trans. Computers, vol. 51, no. 7, pp.750-758, July 2002.
[11] H. Fan and M.A. Hasan, “A New Approach to Subquadratic Space Complexity Parallel Multipliers for Extended Binary Fields,” IEEE Trans. Computers, vol. 56, no. 2, pp.224-233, Feb. 2007.
[12] H. Wu, M.A. Hasan, and I.F. Blake, “New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases,” IEEE Trans. Computers, vol. 47, no. 11, pp.1223-1234, Nov. 1998.
[13] S.T.J. Fenn, M. Benaissa, and D. Taylor, “${\rm GF}(2^{\rm m})$ Multiplication and Division over the Dual Basis,” IEEE Trans. Computers, vol. 45, no. 3, pp.319-327, Mar. 1996.
[14] M. Wang and I.F. Blake, “Bit Serial Multiplication in Finite Fields,” SIAM J. Discrete Math., vol. 3, no. 1, pp.140-148, Feb. 1990.
[15] E.R. Berlekamp, “Bit-Serial Reed-Solomon Encoder,” IEEE Trans. Information Theory, vol. 28, no. 6, pp.869-874, Nov. 1982.
[16] C.Y. Lee and C.W. Chiou, “Efficient Design of Low-Complexity Bit-Parallel Systolic Hankel Multipliers to Implement Multiplication in Normal and Dual Bases of ${\rm GF}(2^{\rm m})$ ,” IEICE Trans. Fundamentals of Electronics, Comm. and Computer Science, vol. E88-A, no. 11, pp.3169-3179, Nov. 2005.
[17] J.L. Massey and J.K. Omura, Computational Method and Apparatus for Finite Field Arithmetic, US patent 4,587,627, May 1986.
[18] C.C. Wang, T.K. Truong, H.M. Shao, L.J. Deutsch, J.K. Omura, and I.S. Reed, “VLSI Architectures for Computing Multiplications and Inverses in ${\rm GF}(2^{\rm m})$ ,” IEEE Trans. Computers, vol. 34, no. 8, pp.709-717, Aug. 1985.
[19] A. Reyhani-Masoleh, “Efficient Algorithms and Architectures for Field Multiplication Using Gaussian Normal Bases,” IEEE Trans. Computers, vol. 55, no. 1, pp.34-47,Jan. 2006.
[20] C.W. Chiou and C.Y. Lee, “Multiplexer-Based Double-Exponentiation for Normal Basis of GF ($2^{\rm m}$ ),” Computers and Security, vol. 24, no. 1, pp.83-86, 2005.
[21] G.B. Agnew, R.C. Mullin, I.M. Onyszchuk, and S.A. Vanstone, “An Implementation for a Fast Public-Key Cryptosystem,” J. Cryptology, vol. 3, pp.63-79, 1991.
[22] M.A. Hasan, M.Z. Wang, and V.K. Bhargava, “A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields,” IEEE Trans. Computers, vol. 42, no. 10, pp.1278-1280, Oct. 1993.
[23] S. Kwon, “A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over ${\rm GF}(2^{\rm m})$ Using an Optimal Normal Basis of Type II,” Proc. 16th IEEE Symp. Computer Arithmetic, pp.196-202, June 2003.
[24] H. Fan and M.A. Hasan, “Subquadratic Computational Complexity Schemes for Extended Binary Field Multiplication Using Optimal Normal Bases,” IEEE Trans. Computers, vol. 56, no. 10, pp.1435-1437, Oct. 2007.
[25] D.W. Ash, I.F. Blake, and S.A. Vanstone, “Low Complexity Normal Bases,” Discrete Applied Math., vol. 25, pp.191-210, 1989.
[26] ANSI X.962, Public Key Cryptography for the Financial Services Industry: The Elliptic Curve Digital Signature Algorithm (ECDSA), Am. Nat'l Standards Inst., 1999.
[27] FIPS 186-2, Digital Signature Standard (DSS), Federal Information Processing Standards Publication 186-2, Nat'l Inst. of Standards and Tech nology, 2000.
[28] IEEE Standard 1363-2000, IEEE Standard Specifications for Public-Key Cryptography, Jan. 2000.
[29] D. Boneh, R. DeMillo, and R. Lipton, “On the Importance of Checking Cryptographic Protocols for Faults,” Proc. Ann. Int'l Conf. Eurocrypt, pp.37-51, 1997.
[30] E. Biham and A. Shamir, “Differential Fault Analysis of Secret Key Cryptosystems,” Proc. Int'l Conf. Cryptology, pp.513-525, 1997.
[31] J. Kelsey, B. Schneier, D. Wagner, and C. Hall, “Side-Channel Cryptanalysis of Product Ciphers,” Proc. European Symp. Research in Computer Security (ESORICS), pp.97-110, Sept. 1998.
[32] R.J. Anderson and M. Kuhn, “Low Cost Attack on Tamper Resistant Devices,” Proc. Fifth Int'l Workshop Security Protocols, 1997.
[33] I. Biehl, B. Meyer, and V. Müller, “Differential Fault Attacks on Elliptic Curve Cryptosystems,” Proc. Int'l Conf. Cryptology 2000, pp.131-146, 2000.
[34] M. Ciet and M. Joye, “Elliptic Curve Cryptosystems in the Presence of Permanent and Transient faults,” Cryptology ePrint Archive, 2003/028, http://eprint.iacr.org/2003028.pdf, 2003.
[35] J. Blömer, M. Otto, and J.-P. Seifert, “Sign Change Fault Attacks on Elliptic Curve Cryptosystems,” Proc. Int'l Workshop Fault Diagnosis and Tolerance in Cryptography (FDTC '06), pp.36-52, 2006.
[36] R. Karri, G. Kuznetsov, and M. Goessel, “Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers,” Proc. Int'l Workshop Cryptographic Hardware and Embedded Systems (CHES '03), pp.113-124, 2003.
[37] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri, and V. Piuri, “Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard,” IEEE Trans. Computers, vol. 52, no. 4, pp.492-505, Apr. 2003.
[38] M. Joye, A.K. Lenstra, and J.-J. Quisquater, “Chinese Remaindering Based Cryptosystems in the Presence of Faults,” J. Cryptology, vol. 12, pp.241-245, 1999.
[39] D. Boneh, R.A. DeMillo, and R.J. Lipton, “On the Importance of Eliminating Errors in Cryptographic Computations,” J. Cryptology, vol. 14, pp.101-119, 2001.
[40] S. Fenn, M. Gossel, M. Benaissa, and D. Taylor, “On-Line Error Detection for Bit-Serial Multipliers in ${\rm GF}(2^{\rm m})$ ,” J. Electronic Testing: Theory and Applications, vol. 13, pp.29-40, 1998.
[41] A. Reyhani-Masoleh and M.A. Hasan, “Error Detection in Polynomial Basis Multipliers over Binary Extension Fields,” Proc. Int'l Workshop Cryptographic Hardware and Embedded Systems (CHES '02), pp.515-528, 2003.
[42] A. Reyhani-Masoleh and M.A. Hasan, “Fault Detection Architectures for Field Multiplication Using Polynomial Bases,” IEEE Trans. Computers, vol. 55, no. 9, pp.1089-1103, Sept. 2006.
[43] C.-Y. Lee, C.W. Chiou, and J.-L. Lin, “Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of ${\rm GF}(2^{\rm m})$ ,” J. Electronic Testing: Theory and Applications, vol. 21, no. 5, pp.539-549, 2005.
[44] C.W. Chiou, “Concurrent Error Detection in Array Multipliers for ${\rm GF}(2^{\rm m})$ Fields,” IEE Electronics Letters, vol. 38, no. 14, pp.688-689, July 2002.
[45] C.W. Chiou, C.Y. Lee, and J.M. Lin, “Concurrent Error Detection in a Polynomial Basis Multiplier over ${\rm GF}(2^{\rm m})$ ,” J. Electronic Testing: Theory and Applications, vol. 22, no. 2, pp.143-150, Apr. 2006.
[46] C.W. Chiou, C.Y. Lee, A.W. Deng, and J.M. Lin, “Concurrent Error Detection in Montgomery Multiplication over ${\rm GF}(2^{\rm m})$ ,” IEICE Trans. Fundamentals of Electronics, Comm., and Computer Science, vol. E89-A, no. 2, pp.566-574, Feb. 2006.
[47] J.H. Patel and L.Y. Fung, “Concurrent Error Detection in ALU's by Recomputing with Shifted Operands,” IEEE Trans. Computers, vol. 31, no. 7, pp.589-595, July 1982.
[48] J.H. Patel and L.Y. Fung, “Concurrent Error Detection in Multiply and Divide Arrays,” IEEE Trans. Computers, vol. 32, no. 4, pp.417-422, Apr. 1983.
[49] A.J. Menezes, Applications of Finite Fields. Kluwer Academic Publications, 1993.
[50] I.F. Blake, R.M. Roth, and G. Seroussi, “Efficient Arithmetic in ${\rm GF}(2^{\rm m})$ through Palindromic Representation,” Technical Report HPL-98-134, http://www.hpl.hp.com/techreports/98HPL-98-134.html , 1998.
[51] H.Y. Kim, J.Y. Park, J.H. Cheon, J.H. Park, J.H. Kim, and S.G. Hahn, “Fast Elliptic Curve Point Counting Using Gaussian Normal Basis,” Proc. Ann. Int'l Conf. EUROCRYPT 2002, pp.14-28, 2002.
[52] N. Weste and K. Eshraghian, Principles of CMOS VLSI Design: A System Perspective. Addison-Wesley, 1985.
[53] M74HC86, Quad Exclusive OR Gate, STMicroelectronics, http://www.st.com/stonline/books/pdf/docs 2006.pdf, 2001.
[54] M74HC08, Quad 2-Input AND Gate, STMicroelectronics, http://www.st.com/stonline/books/pdf/docs 1885.pdf, 2001.
[55] M74HC279, Quad ${\rm\bar S}-{\rm\bar R}$ Latch, STMicroelectronics, http://www.st.com/stonline/books/pdf/docs 1937.pdf, 2001.
[56] M74HC32: Quad 2-Input OR Gate, STMicroelectronics, http://www.st.com/stonline/books/pdf/docs 1944.pdf, 2001.

