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Issue No.06 - June (2009 vol.58)
pp: 721-727
Heumpil Cho , Qualcomm, Inc., San Diego
Earl E. Swartzlander, Jr. , University of Texas at Austin, Austin
ABSTRACT
Quantum-dot cellular automata (QCA) is an emerging nanotechnology, with the potential for faster speed, smaller size, and lower power consumption than transistor-based technology. Quantum-dot cellular automata has a simple cell as the basic element. The cell is used as a building block to construct gates and wires. Previously, adder designs based on conventional designs were examined for implementation with QCA technology. That work demonstrated that the design trade-offs are very different in QCA. This paper utilizes the unique QCA characteristics to design a carry flow adder that is fast and efficient. Simulations indicate very attractive performance (i.e., complexity, area, and delay). This paper also explores the design of serial parallel multipliers. A serial parallel multiplier is designed and simulated with several different operand sizes.
INDEX TERMS
Adder, multiplier, carry flow adder, carry delay multiplier, quantum-dot cellular automata (QCA).
CITATION
Heumpil Cho, Earl E. Swartzlander, Jr., "Adder and Multiplier Design in Quantum-Dot Cellular Automata", IEEE Transactions on Computers, vol.58, no. 6, pp. 721-727, June 2009, doi:10.1109/TC.2009.21
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