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LiangKai Wang, Michael J. Schulte, John D. Thompson, Nandini Jairam, "Hardware Designs for Decimal FloatingPoint Addition and Related Operations," IEEE Transactions on Computers, vol. 58, no. 3, pp. 322335, March, 2009.  
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@article{ 10.1109/TC.2008.147, author = {LiangKai Wang and Michael J. Schulte and John D. Thompson and Nandini Jairam}, title = {Hardware Designs for Decimal FloatingPoint Addition and Related Operations}, journal ={IEEE Transactions on Computers}, volume = {58}, number = {3}, issn = {00189340}, year = {2009}, pages = {322335}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2008.147}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Hardware Designs for Decimal FloatingPoint Addition and Related Operations IS  3 SN  00189340 SP322 EP335 EPD  322335 A1  LiangKai Wang, A1  Michael J. Schulte, A1  John D. Thompson, A1  Nandini Jairam, PY  2009 KW  Arithmetic and logic units KW  Computer arithmetic KW  Algorithms KW  HighSpeed Arithmetic KW  Arithmetic and Logic Structures KW  Hardware VL  58 JA  IEEE Transactions on Computers ER   
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