CSDL - IEEE Transactions on Computers

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A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format (Abstract)

Marius Cornea, Intel Corporation, Hillsboro

John Harrison, Intel Corporation, Hillsboro

Cristina Anderson, Intel Corporation, Hillsboro

Ping Tak Peter Tang, Intel Corporation, Hillsboro

Eric Schneider, Intel Corporation, Hillsboro

Evgeny Gvozdev, Intel Corporation, Hillsboro

pp. 148-162

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A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^{k}: Algorithms and Lookup Structures (Abstract)

Alexandru Fit-Florea, Advanced Micro Devices, Inc., Sunnyvale

Lun Li, Texas Instruments, Dallas

Mitchell A. Thornton, Southern Methodist University, Dallas

David W. Matula, Southern Methodist University, Dallas

pp. 163-174

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Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support (Abstract)

Dimitri Tan, Advanced Micro Devices Inc., Austin

Carl E. Lemonds, Advanced Micro Devices Inc., Austin

Michael J. Schulte, University of Wisconsin-Madison, Madison

pp. 175-187

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Improved Computation of Square Roots in Specific Finite Fields (Abstract)

Dong-Guk Han, Electronics and Telecommunications Research Institute, Daejeon

Dooho Choi, Electronics and Telecommunications Research Institute, Daejeon

Howon Kim, Pusan National University, Korea

pp. 188-196

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An Efficient Rounding Boundary Test for {\rm pow}(x, y) in Double Precision (Abstract)

Christoph Quirin Lauter, École Normale Supérieure de Lyon, Lyon

Vincent Lefèvre, LIP ENS Lyon INRIA, Lyon

pp. 197-207

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Pipelining Saturated Accumulation (Abstract)

Karl Papadantonakis, Myricom, Arcadia

Nachiket Kapre, CALTECH, Pasadena

Stephanie Chan, Numerica Corp., Loveland

André DeHon, University of Pennsylvania, Philadelphia

pp. 208-219

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Kahan's Algorithm for a Correct Discriminant Computation at Last Formally Proven (Abstract)

Sylvie Boldo, INRIA, ORSAY

pp. 220-225

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Verified Real Number Calculations: A Library for Interval Arithmetic (Abstract)

Marc Daumas, ELIAUS, UPVD, Perpignan

David Lester, University of Manchester, Manchester

Céar Muñoz, National Institute of Aerospace, Hampton

pp. 226-237

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Regular Papers

An Enhanced Universal N x N Fully Nonblocking Quantum Switch (Abstract)

Chuan-Ching Sue, National Cheng Kung University, Tainan

pp. 238-250

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Using Node Diagnosability to Determine t-Diagnosability under the Comparison Diagnosis Model (Abstract)

Chieh-Feng Chiang, National Chiao Tung University, Hsinchu

Jimmy J.M. Tan, National Chiao Tung University, Hsinchu

pp. 251-259

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Localized Independent Packet Scheduling for Buffered Crossbar Switches (Abstract)

Deng Pan, Florida International University, Miami

Yuanyuan Yang, State University of New York, Stony Brook

pp. 260-274

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Brief Contributions

Error-Correcting Codes for Ternary Content Addressable Memories (Abstract)

Sriram C. Krishnan, Cisco Systems Inc, San Jose

Rina Panigrahy, Microsoft Research, Mountain View

Sunil Parthasarathy, Cisco Systems Inc, San Jose

pp. 275-279

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A Response-Time Bound in Fixed-Priority Scheduling with Arbitrary Deadlines (Abstract)

Enrico Bini, Scuola Superiore Sant'Anna, Pisa

Thi Huyen Châu Nguyen, University of Poitiers, Poitiers

Pascal Richard, University of Poitiers, Poitiers

Sanjoy K. Baruah, University of North Carolina, Chapel Hill

pp. 279-286

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Errata

Correction to: Reduced Length Checking Sequences (HTML)

R. M. Hierons, Brunel University, Uxbridge, Middlesex

H. Ural, University of Ottawa, Ottawa

pp. 287-287