Issue No.11 - November (2008 vol.57)
Radu Muresan , University of Guelph, Guelph
Stefano Gregori , University of Guelph, Guelph
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2008.107
In this paper, we present a circuit that protects smart cards against differential power analysis attacks. The circuit is based on a current flattening technique, is designed using a standard 0.18-µm CMOS technology, and can be integrated on the same die or in the same package with the smart card microcontroller. We evaluate the current flattening performance and the effectiveness of the protection against differential power analysis attacks. Our analysis is based on transistor-level simulations in Cadence environment using experimental current traces collected from an 8-bit microcontroller for smart cards executing DES encryptions. The proposed circuit effectively protects against differential power analysis attacks with small chip area overhead and limited increased power consumption during the encryption cycles.
VLSI, Security and Privacy Protection
Radu Muresan, Stefano Gregori, "Protection Circuit against Differential Power Analysis Attacks for Smart Cards", IEEE Transactions on Computers, vol.57, no. 11, pp. 1540-1549, November 2008, doi:10.1109/TC.2008.107