Issue No.11 - November (2008 vol.57)
Kazuo Sakiyama , University of Electro-Communications, Tokyo
Lejla Batina , K.U.Leuven, Leuven-Heverlee
Ingrid Verbauwhede , University of California, Los Angeles and K.U.Leuven
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2008.148
RFID (Radio Frequency IDentification) tags need to include security functions, yet at the same time their resources are extremely limited. Moreover, to provide privacy, authentication and protection against tracking of RFID tags without loosing the system scalability, a public-key based approach is inevitable, which is shown by M. Burmester et al. In this paper, we present an architecture of a state-of-the-art processor for RFID tags with an Elliptic Curve (EC) processor over GF(2^163). It shows the plausibility of meeting both security and efficiency requirements even in a passive RFID tag. The proposed processor is able to perform EC scalar multiplications as well as general modular arithmetic (additions and multiplications) which are needed for the cryptographic protocols. As we work with large numbers, the register file is the most critical component in the architecture. By combining several techniques, we are able to reduce the number of registers from 9 to 6 resulting in EC processor of 10.1K gates. To obtain an efficient modulo arithmetic, we introduce a redundant modular operation. Moreover the proposed architecture can support multiple cryptographic protocols. The synthesis results with a 0.13 um CMOS technology show that the gate area of the most compact version is 12.5K gates.
Support for security, Micro-architecture implementation considerations, Processor Architectures, Compu, Special-purpose, General, Low-power design
Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede, "Elliptic-Curve-Based Security Processor for RFID", IEEE Transactions on Computers, vol.57, no. 11, pp. 1514-1527, November 2008, doi:10.1109/TC.2008.148