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Issue No.10 - October (2008 vol.57)
pp: 1372-1386
Prateek Pujara , Binghamton University, Binghamton
Aneesh Aggarwal , Binghamton University, Binghamton
ABSTRACT
Caches are very inefficiently utilized because not all the excess data brought into the cache, to exploit spatial locality, is utilized. Our experiments showed that Level 1 data cache has a utilization of only about 57%. Increasing the efficiency of the cache (by increasing its utilization) can have significant benefits in terms of reducing the cache energy consumption, reducing the bandwidth requirement, and making more cache space available for the useful data. In this paper, we focus on prediction mechanisms to predict the useless data in a cache block (cache noise), so that only the useful data is brought into the cache on a cache miss. The prediction mechanisms consider the words usage history of cache blocks for predicting the useful data. We obtained a predictability of about 95% with a simple last words usage predictor. When applying cache noise prediction to L1 data cache, we observed about 37% improvement in cache utilization, and about 23% and 28% reduction in cache energy consumption and bandwidth requirement, respectively. Cache noise mispredictions increased the miss rate by 0.1% and had almost no impact on instructions per cycle (IPC) count.
INDEX TERMS
Superscalar, dynamically-scheduled, and statically-scheduled implementation, Memory hierarchy
CITATION
Prateek Pujara, Aneesh Aggarwal, "Cache Noise Prediction", IEEE Transactions on Computers, vol.57, no. 10, pp. 1372-1386, October 2008, doi:10.1109/TC.2008.75
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