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Issue No.10 - October (2008 vol.57)
pp: 1300-1314
Stavros Tripakis , Cadence, Berkeley
Claudio Pinello , Cadence, Berkeley
Albert Benveniste , INRIA, Rennes
Alberto Sangiovanni-Vincent , University of California at Berkeley, Berkeley
Paul Caspi , CNRS, Grenoble
Marco Di Natale , Scuola Superiore Santa Anna c/o Scuola Superiore S. Anna, Pisa
ABSTRACT
Synchronous systems offer a clean semantics and an easy verification path at the expense of often inefficient implementations. Capturing design specifications as synchronous models and then implementing the specifications in a less restrictive platform allow to address a much larger design space. The key issue in this approach is maintaining semantic equivalence between the synchronous model and its implementation. We address this problem by showing how to map a synchronous model onto a loosely time-triggered architecture that is fairly straightforward to implement as it does not require global synchronization or blocking communication. We show how to maintain semantic equivalence between specification and implementation using an intermediate model (similar to a Kahn process network but with finite queues) that helps in defining the transformation. Performance of the semantic preserving implementation is studied for the general case as well as for a few special cases.
INDEX TERMS
Real-time systems and embedded systems, Models of Computation, System architectures, integration and modeling
CITATION
Stavros Tripakis, Claudio Pinello, Albert Benveniste, Alberto Sangiovanni-Vincent, Paul Caspi, Marco Di Natale, "Implementing Synchronous Models on Loosely Time Triggered Architectures", IEEE Transactions on Computers, vol.57, no. 10, pp. 1300-1314, October 2008, doi:10.1109/TC.2008.81
REFERENCES
[1] L. Lamport, “Time, Clocks, and the Ordering of Events in a Distributed System,” Comm. ACM, vol. 21, no. 7, pp. 558-565, 1978.
[2] N.A. Lynch, Distributed Algorithms. Morgan Kaufmann, 1996.
[3] H. Kopetz, Real-Time Systems. Kluwer Academic, 1997.
[4] P. Caspi, A. Curic, A. Maignan, C. Sofronis, S. Tripakis, and P. Niebert, “From Simulink to SCADE/Lustre to TTA: A Layered Approach for Distributed Embedded Applications,” Proc. Languages, Compilers, and Tools for Embedded Systems, pp. 153-162, 2003.
[5] A. Benveniste, P. Caspi, P.L. Guernic, H. Marchand, J.-P. Talpin, and S. Tripakis, “A Protocol for Loosely Time-Triggered Architectures,” Proc. Second Int'l Conf. Embedded Software, pp.252-265, 2002.
[6] K.-E. Årzén, “Timing Analysis and Simulation Tools for Real-Time Control,” Proc. Int'l Conf. Formal Modelling and Analysis of Timed Systems, 2005.
[7] A. Sangiovanni-Vincentelli, “Quo Vadis SLD? Reasoning about Trends and Challenges of System Level Design,” Proc. IEEE, vol. 95, no. 3, pp. 467-506, 2007.
[8] J. Romberg and A. Bauer, “Loose Synchronization of Event-Triggered Networks for Distribution of Synchronous Programs,” Proc. Second Int'l Conf. Embedded Software, pp. 193-202, 2004.
[9] M. Baleani, A. Ferrari, L. Mangeruca, and A.L. Sangiovanni-Vincentelli, “Efficient Embedded Software Design with Synchronous Models,” Proc. Second Int'l Conf. Embedded Software, pp. 187-190, 2005.
[10] A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, A.L. Sangiovanni-Vincentelli, and S. Tripakis, “Communication by Sampling in Time-Sensitive Distributed Systems,” Proc. Second Int'l Conf. Embedded Software, pp. 152-160, 2006.
[11] C. Kossentini and P. Caspi, “Approximation, Sampling and Voting in Hybrid Computing Systems,” Proc. Int'l Workshop Hybrid Systems: Computation and Control, pp. 363-376, 2006.
[12] L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli, “Theory of Latency-Insensitive Design,” IEEE Trans. Computer Automated Design of Integrated Circuits and Systems, vol. 20, no. 9, pp. 1059-1076, 2001.
[13] L.P. Carloni, “The Role of Back-Pressure in Implementing Latency-Insensitive Systems,” Electronic Notes in Theoretical Computer Science, vol. 146, no. 2, pp. 61-80, 2006.
[14] J. Cortadella and M. Kishinevsky, “Synchronous Elastic Circuits with Early Evaluation and Token Counterflow,” Proc. Design Automation Conf., pp. 416-419, 2007.
[15] J. Sifakis, “Use of Petri Nets for Performance Evaluation,” Proc. Int'l Symp. Measuring Measuring, Modelling and Evaluating Computer Systems, pp. 75-93, 1977.
[16] F. Baccelli, G. Cohen, G.J. Olsder, and J.-P. Quadrat, Synchronisation and Linearity. Wiley, 1992.
[17] A. Benveniste, P. Caspi, S.A. Edwards, N. Halbwachs, P.L. Guernic, and R. de Simone, “The Synchronous Languages 12Years Later,” Proc. IEEE, vol. 91, no. 1, pp. pp. 64-83, 2003.
[18] F. Xia, A. Yakovlev, I. Clark, and D. Shang, “Data Communication in Systems with Heterogeneous Timing,” IEEE Micro, vol. 22, no. 6, pp. 58-69, Nov./Dec. 2002.
[19] F. Xia, F. Hao, I. Clark, A. Yakovlev, and E.G. Chester, “Buffered Asynchronous Communication Mechanisms,” Fundamenta Informaticae, vol. 70, no. 1, pp. 155-170, 2006.
[20] G. Kahn, “The Semantics of a Simple Language for Parallel Programming,” Proc. IFIP Congress, Information Processing, 1974.
[21] P. Caspi and M. Pouzet, “Synchronous Kahn Networks,” Proc. Int'l Conf. Functional Programming, pp. 226-238, 1996.
[22] S. Even and S. Rajsbaum, “The Use of a Synchronizer Yields Maximum Computation Rate in Distributed Networks,” Proc. 22nd Ann. ACM Symp. Theory of Computing, pp. 95-105, 1990.
[23] A. Benveniste and G. Berry, “The Synchronous Approach to Reactive and Real-Time Systems,” Proc. IEEE, vol. 79, no. 9, pp.1270-1282, 1991.
[24] J. Cortadella, A. Kondratyev, L. Lavagno, and C.P. Sotiriou, “Desynchronization: Synthesis of Asynchronous Circuits from Synchronous Specifications,” IEEE Trans. Computer Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 1904-1921, 2006.
[25] K.C. Gorgônio, J. Cortadella, F. Xia, and A. Yakovlev, “Automating Synthesis of Asynchronous Communication Mechanisms,” Fundamenta Informaticae, vol. 78, no. 1, pp. 75-100, 2007.
[26] F. Commoner, A.W. Holt, S. Even, and A. Pnueli, “Marked Directed Graphs,” J. Computer and System Science, vol. 5, pp. 511-523, 1971.
[27] T. Murata, “Petri Nets: Properties, Analysis and Applications,” Proc. IEEE, vol. 77, no. 4, pp. 541-580, Apr. 1989.
[28] A. Valmari, “Eliminating Redundant Interleavings during Concurrent Program Verification,” Proc. Parallel Architectures and Languages Europe, pp. 89-103, 1989.
[29] M.D. Natale, A. Benveniste, P. Caspi, C. Pinello, A. Sangiovanni-Vincentelli, and S. Tripakis, “Applying LTTA to Guarantee Flow of Data Requirements in Distributed Systems Using Controller Area Networks,” Proc. Design, Automation and Test in Europe Workshop Dependable Software Systems, 2008.
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