The Community for Technology Leaders
RSS Icon
Issue No.07 - July (2008 vol.57)
pp: 965-977
Techniques for advanced logic design in spatial dimensions for the purposes of nano-devices and nanoICs are being formulated to incorporate certain topologies that satisfy certain requirements of nanotechnology. The hypercube is considered a relevant topology for the design of the N-hypercube in which switching functions are embedded. We propose using a similar topology for designing of sequential logic in spatial dimensions. The M-hypercube which is an extension of the hypercube topology is introduced as a building block for spatial sequential logic design. This cube can represent any finite state machine with any possible configuration. An MN-cell which is a combination of M- and N-hypercubes is introduced with several examples containing various embedding and assignment techniques of the M-hypercube and MN-cell. This paper presents logic design approaches to reduce the complexity of large M-hypercube representation via sequential machine decomposition. A study of the logic design of a basic computer in nanospace using M- and N-hypercube cells as building blocks is also presented with several examples included.
Sequential circuits, Logic Design, hypercube, nanocomputer
Samuel C. Lee, "Logic and Computer Design in Nanospace", IEEE Transactions on Computers, vol.57, no. 7, pp. 965-977, July 2008, doi:10.1109/TC.2007.70812
[1] “Electronic Design Automation at the Turn of Century,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 12, 2000.
[2] Y. Li, F. Qian, J. Xiang, and C.M. Leiber, “Nanowire Electronic and Optoelectronic Devices,” Materials Today, vol. 9, pp. 18-27, 2006.
[3] P.J. Pauzauskie, A. Radenovic, E. Trepagnier, H. Shroff, P. Yang, and J. Liphardt, “Optical Trapping and Integration of Semiconductor Nanowire Assemblies in Water,” Nature Materials, vol. 5, pp. 97-101, 2006.
[4] M. Law, J. Goldberger, and P. Yang, “Semiconductor Nanowires and Nanotubes,” Ann. Rev. Materials Science, vol. 34, p. 83, 2004.
[5] E. Borovitskaya and M. Shur, Quantum Dots. World Scientific, 2002.
[6] J.P. Bird, Electron Transport in Quantum Dots. Kluwer Academic, 2003.
[7] Introduction to Molecular Electronics, M.C. Petty, M.R. Bryce, and D.Bloor, eds. Oxford Univ. Press, 1995.
[8] M.A. Reed and J.M. Tour, “Computing with Molecules,” Scientific Am., pp. 86-93, June 2006.
[9] J.M. Tour, Molecular Electronics: Commercial Insights, Chemistry, Devices, Architecture and Programming. World Scientific, 2003.
[10] J.M. Tour, W.L.W. Zandt, C.P. Husband, S.M. Husband, L.S. Wilson, P.D. Franzon, and D.P. Nackashi, “Nanocell Logic Gates for Molecular Computing,” IEEE Trans. Nanotechnology, vol. 1, no. 2, pp. 100-109, 2002.
[11] P.G. Depledge, “Fault-Tolerance Computer Systems,” IEE Proc., vol. 128, pp. 257-263, 1981.
[12] J.R. Heath, P.J. Kuekes, G.S. Snider, and R.S. Williams, “A Defect-Tolerance Computer Architecture: Opportunity for Nanotechnology,” Science, vol. 280, pp. 1716-1718, 1998.
[13] S. Mitra, N.R. Saxena, and E.J. McCluskey, “Common-Mode Failures in Redundant VLSI Systems: A Survey,” IEEE Trans. Reliability, vol. 49, pp. 285-299, 2000.
[14] S. Yanushkevich, V. Shmerko, and S. Lyshevski, Logic Design of NanoICs. CRC Press, 2005.
[15] Future Trends in Microelectronics: The Nano Millennium, S. Luryi, J.Xu, and A. Zaslavsky, eds. Wiley-IEEE Press, 2002.
[16] S.E. Lyshevski, “Nanocomputers and Nanoarchitectronics,” Handbook of Nanoscience, Engineering and Technology, W. Goddard, D.Brenner, S. Lyshevski, and G. Iafrate, eds., vol. 6, pp. 1-39, CRC Press, 2002.
[17] S.E. Lyshevski, “Nanotechnology and Super High-Density Three-Dimensional Nanoelectronics and NanoICs,” Proc. Third IEEE Conf. Nanotechnology, vol. 2, pp. 655-658, Aug. 2003.
[18] Y. Saad and M.H. Schultz, “Topological Properties of Hypercubes,” IEEE Trans. Computers, vol. 37, no. 7, July 1988.
[19] N. Linial, E. London, and Y. Rabinovich, “The Geometry of Graphs and Some of Its Applications,” Foundations of Computer Science, pp. 577-591, 1994.
[20] S. Yanushkevich and V. Shmerko, “Three-Dimensional Feedforward Neural Networks and Their Realization by Nano-Devices,” Artificial Intelligence Rev., vol. 20, pp. 473-494, 2003.
[21] A.Y. Wu, “Embedding a Tree Network into Hypercubes,” J.Parallel and Distributed Computing, vol. 2, pp. 238-249, 1985.
[22] E.L. Leiss and H.N. Reddy, “Embedding Complete Binary Trees into Hypercubes,” Int'l Parallel Letters, vol. 38, pp. 197-199, 1991.
[23] J. Hartmanis and R.E. Stearns, Algebraic Structure Theory of Sequential Machines. Prentice Hall, 1966.
[24] S. Lee, Modern Switching Theory and Digital Design. Prentice Hall, 1978.
[25] M.M. Mano and C.R. Kime, Logic and Computer Design Fundamentals, third ed. Prentice Hall, 2004.
[26] N.F. Tzeng, P. Chuang, and H. Chen, “Embedding in Incomplete Hypercube,” Proc. 19th Int'l Conf. Parallel Processing, vol. 3, pp.335-339, Aug. 1990.
[27] N.F. Tzeng and S. Wei, “Enhanced Hypercubes,” IEEE Trans. Computers, vol. 40, no. 3, pp. 284-294, Mar. 1991.
60 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool