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Luigi Dadda, "Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach," IEEE Transactions on Computers, vol. 56, no. 10, pp. 13201328, October, 2007.  
BibTex  x  
@article{ 10.1109/TC.2007.1067, author = {Luigi Dadda}, title = {Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach}, journal ={IEEE Transactions on Computers}, volume = {56}, number = {10}, issn = {00189340}, year = {2007}, pages = {13201328}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2007.1067}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach IS  10 SN  00189340 SP1320 EP1328 EPD  13201328 A1  Luigi Dadda, PY  2007 KW  Computer arithmetic KW  decimal arithmetic KW  multioperand adders KW  hardware design VL  56 JA  IEEE Transactions on Computers ER   
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